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[Proceedings 1991] Third International Conference Indium Phosphide and Related Materials最新文献

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Comparison of n/sup +/p and p/sup +/n structures in indium phosphide solar cells 磷化铟太阳能电池中n/sup +/p和p/sup +/n结构的比较
R. Jain, I. Weinberg, D. Flood
The expected performances of n/sup +/p and p/sup +/n indium phosphide solar cells are compared. PC-1D, a quasi-one-dimensional computer program based on solving semiconductor transport equations by a finite-element method, was used to model n/sup +/p and p/sup +/n indium phosphide solar cell structures. The calculations show that the n/sup +/p structure offers a better short-circuit current, but that the p/sup +/n structure offers improved open-circuit voltage and overall gain in cell efficiency. The radiation resistance of p/sup +/n InP cells is compared to that of n/sup +/p cells. It is shown that the conflicting results obtained in experiments indicate the need for a systematic reevaluation of the comparative radiation resistance of the two InP cell configurations.<>
比较了n/sup +/p和p/sup +/n磷化铟太阳能电池的预期性能。利用准一维计算机程序PC-1D基于有限元方法求解半导体输运方程,对n/sup +/p和p/sup +/n磷化铟太阳能电池结构进行了建模。计算表明,n/sup +/p结构提供了更好的短路电流,但p/sup +/n结构提供了更好的开路电压和电池效率的总体增益。比较了p/sup +/n InP电池与n/sup +/p电池的耐辐射性能。结果表明,实验中得到的相互矛盾的结果表明,需要系统地重新评估两种InP电池结构的比较抗辐射能力。
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引用次数: 6
Electrical and optical characteristics of Mg implanted semi-insulating InP Mg注入半绝缘InP的电学和光学特性
P. Krauz, E. Rao, B. Descouts, Y. Gao, H. Thibierge
A study of medium dose Mg implants to achieve shallow p/sup +/ surface layers in Fe doped SI InP is presented. The influence of several parameters, such as the temperature of implants and P co-implant conditions, as well as the post-implant anneals are discussed. It is shown that the out-diffusion of implanted Ma that occurs during rapid thermal annealing (RTA) can be controlled by either InP proximity cap anneals or P co-implants. The undesirable deep in-diffusion can be reduced by performing Mg implants at 200 degrees C or by realizing P co-implants behind the Mg profile. The limitation of Mg solubility in InP is demonstrated to be the principal cause of its low electrical activation. Using the optimized implant and anneal conditions, a maximum of real Mg activation with a high degree of crystal perfection and abrupt shallow p/sup +/ layers in SI InP was achieved.<>
研究了中剂量Mg植入物在Fe掺杂SI InP中实现浅p/sup +/表面层的方法。讨论了植入体温度、P共植入条件以及植入后退火等参数的影响。结果表明,快速退火(RTA)过程中注入的Ma向外扩散可以通过InP邻近帽退火或P共注入来控制。通过在200℃下植入Mg或在Mg剖面后面实现P共植入,可以减少不良的深度扩散。镁在InP中溶解度的限制被证明是其低电活化的主要原因。在优化的植入和退火条件下,获得了最大的真实Mg活化,晶体完美度高,SI InP中突然出现浅p/sup +/层。
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引用次数: 0
Orthorhombic distortion of mismatched In/sub x/Ga/sub 1-x/As/InP heterostructures 错配In/sub x/Ga/sub 1-x/As/InP异质结构的正交畸变
B. R. Bennett, J. D. del Alamo
Thin, mismatched epilayers tetragonally distort to form coherent interfaces. Beyond the critical thickness, misfit dislocations relieve strain. The dislocations form in an asymmetric pattern on
薄的,不匹配的脱毛层四方扭曲形成相干界面。在临界厚度之外,错配位错解除了应变。位错形成不对称的模式
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引用次数: 0
InGaAs/InP OEIC's for optical computing 用于光学计算的InGaAs/InP OEIC
F. Beyette, X. An, S. Feld, M. Hafich, G. Y. Robinson, C. Wilmsen
Techniques for optically controlling the latching capabilities of the light amplifying optical switch (LAOS) are described. It is shown that the latching can be controlled by reducing either the voltage or the current of the latching element. The operation and design of functional blocks that implement set/reset flip flops, gated latches, and inverting logic are discussed.<>
介绍了光放大光开关锁存能力的光学控制技术。结果表明,可以通过降低闭锁元件的电压或电流来控制闭锁。讨论了实现设置/复位触发器、门控锁存器和反相逻辑的功能模块的操作和设计
{"title":"InGaAs/InP OEIC's for optical computing","authors":"F. Beyette, X. An, S. Feld, M. Hafich, G. Y. Robinson, C. Wilmsen","doi":"10.1109/ICIPRM.1991.147316","DOIUrl":"https://doi.org/10.1109/ICIPRM.1991.147316","url":null,"abstract":"Techniques for optically controlling the latching capabilities of the light amplifying optical switch (LAOS) are described. It is shown that the latching can be controlled by reducing either the voltage or the current of the latching element. The operation and design of functional blocks that implement set/reset flip flops, gated latches, and inverting logic are discussed.<<ETX>>","PeriodicalId":6444,"journal":{"name":"[Proceedings 1991] Third International Conference Indium Phosphide and Related Materials","volume":"33 1","pages":"150-153"},"PeriodicalIF":0.0,"publicationDate":"1991-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86070708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Self-aligned gate recess technology for the fabrication of InAlAs/InGaAs HEMT structures, using InAlAs as an etch-stop layer 利用InAlAs作为刻蚀停止层,制造InAlAs/InGaAs HEMT结构的自对准栅极凹槽技术
C. Lauterbach, H. Albrecht, M. Beschorner, R. Gessner, M. Schier
A self-aligned gate recess technology for the fabrication of InAlAs/InGaAs HEMTs is discussed. The applied reactive ion etching (RIE) process has a selectivity for InGaAs over InAlAs of 6:1, allowing a thin InAlAs Schottky barrier layer. The self-aligned Ti/Au metallization is suitable for the reproducible fabrication of gate lengths down to 0.3 mu m, starting with a 1 mu m recess. Realized gate leakage currents of 100 nA at a reverse bias of 5 V show that no degradation of the Schottky barrier occurs due to the process technology. With first HEMTs a transconductance of 400 mS/mm and a cutoff frequency of 22 GHz have been achieved.<>
讨论了一种用于制造InAlAs/InGaAs hemt的自对准栅极凹槽技术。应用的反应离子蚀刻(RIE)工艺对InGaAs的选择性为6:1,允许薄的InAlAs肖特基势垒层。自对准Ti/Au金属化适用于栅极长度小于0.3 μ m的可重复制造,从1 μ m凹槽开始。在5 V的反向偏置下实现了100 nA的栅漏电流,表明该工艺技术没有导致肖特基势垒的退化。第一批hemt实现了400 mS/mm的跨导和22 GHz的截止频率
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引用次数: 7
Monolithically integrated In/sub 0.60/Ga/sub 0.47/As/In/sub 0.52/Al/sub 0.48/As/InP photoreceivers with submicron devices 单片集成In/sub 0.60/Ga/sub 0.47/As/In/sub 0.52/Al/sub 0.48/As/InP光电接收器与亚微米器件
R. Lai, P. Bhattacharya, D. Pavlidis
The performance characteristics of planar InP-based PIN-MODFET front-end photoreceivers realized by molecular beam epitaxial regrowth are discussed. The full width at half maximum (FWHM) of the temporal response to photoexcitation for the full circuit is shown to be 60 ps, which translates to a bandwidth of approximately 6.5 GHz. The measured electrical 3-dB frequency response of the circuit with an effective input load resistance of 33 Omega is 15.0 GHz.<>
讨论了分子束外延再生技术实现的平面inp型PIN-MODFET前端光电接收器的性能特点。整个电路的光激发时间响应的半最大值全宽度(FWHM)显示为60 ps,其转换为约6.5 GHz的带宽。在有效输入负载电阻为33 ω的情况下,电路的实测电频响应为15.0 GHz.>
{"title":"Monolithically integrated In/sub 0.60/Ga/sub 0.47/As/In/sub 0.52/Al/sub 0.48/As/InP photoreceivers with submicron devices","authors":"R. Lai, P. Bhattacharya, D. Pavlidis","doi":"10.1109/ICIPRM.1991.147399","DOIUrl":"https://doi.org/10.1109/ICIPRM.1991.147399","url":null,"abstract":"The performance characteristics of planar InP-based PIN-MODFET front-end photoreceivers realized by molecular beam epitaxial regrowth are discussed. The full width at half maximum (FWHM) of the temporal response to photoexcitation for the full circuit is shown to be 60 ps, which translates to a bandwidth of approximately 6.5 GHz. The measured electrical 3-dB frequency response of the circuit with an effective input load resistance of 33 Omega is 15.0 GHz.<<ETX>>","PeriodicalId":6444,"journal":{"name":"[Proceedings 1991] Third International Conference Indium Phosphide and Related Materials","volume":"16 1","pages":"407-410"},"PeriodicalIF":0.0,"publicationDate":"1991-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91006961","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Semi-insulating InP:Fe regrowth by hydride VPE around P-InP substrate laser mesas fabricated by reactive ion etching 反应离子刻蚀制备的半绝缘InP:Fe衬底激光平台周围的氢化物VPE再生
S. Lourdudoss, S. Nilsson, L. Backbom, T. Klinga, O. Kjebon, B. Holmberg
The regrowth of SI-InP:Fe by hydride vapor-phase epitaxy (HVPE) around reactive-ion-etched (RIE) vertical mesas of lasers grown on Zn-doped p-InP substrate is described. The laser performance measurements show that at 20 degrees C, the DC and pulsed power saturation currents are 300 mA and >600 mA, or 20 and >40 times the threshold current, respectively. The characteristic temperature is 63 K. It is inferred that the overall performance can be improved by minimizing the actual series resistance of 5.6 Omega . The regrown SI-InP:Fe is highly current blocking despite its adjacency to InP:Zn substrate.<>
描述了在掺锌p-InP衬底上生长的激光的反应蚀刻(RIE)垂直台面周围,利用氢化物气相外延(HVPE)再生SI-InP:Fe。激光性能测量表明,在20℃时,直流和脉冲功率饱和电流分别为300 mA和>600 mA,分别为阈值电流的20和>40倍。特征温度为63k。由此推断,将5.6 ω的实际串联电阻最小化,可以提高整体性能。再生长的SI-InP:Fe虽然与InP:Zn衬底相邻,但具有很强的阻流性。
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引用次数: 0
InP Schottky diodes and MESFETs with enhanced barrier height using InP/sub x/O/sub y/ films 利用InP/sub x/O/sub y/薄膜增强势垒高度的InP肖特基二极管和mesfet
D. Kusumi, Y. Ohkubo, M. Ura, M. Ohmori
An InP/sub x/O/sub y/ film formed by P/sub 2/O/sub 5/ evaporation and annealing below 380 degrees C was applied to enhance the Schottky barrier height for InP diodes and MESFETs. Optimizing the film formation, an InPxO/sub y/ film of less than 10 nm in thickness has been obtained reproducibly. The film and the film/InP interface were evaluated by X-ray photoelectron spectroscopy (XPS) and Auger electron Spectroscopy (AES) analysis. The best Au (1 mm phi )/InP/sub x/O/sub y//InP diode showed barrier height as high as 0.95 eV, an ideality factor of 1.2, and a reverse current of 100 pA at -10 V. Applying the structure of Au-InP/sub x/O/sub y/-InP to the MESFET, a transconductance of 106 mS/mm in the 0.8 mu m gate length FET was demonstrated.<>
采用P/sub 2/O/sub 5/蒸发和380℃下退火形成的InP/sub x/O/sub y/薄膜,提高了InP二极管和mesfet的肖特基势垒高度。通过优化成膜工艺,获得了厚度小于10nm的InPxO/ suby /薄膜。采用x射线光电子能谱(XPS)和俄歇电子能谱(AES)对膜和膜/InP界面进行了评价。最佳Au (1 mm phi)/InP/sub x/O/sub y//InP二极管的势垒高度高达0.95 eV,理想因数为1.2,在-10 V时的反向电流为100 pA。将Au-InP/sub x/O/sub y/-InP结构应用到MESFET中,在0.8 μ m栅极长度的FET中显示了106 mS/mm的跨导。
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引用次数: 0
Material characterisation of InGaAs/InAlAs heterostructure field effect transistors with heavily doped n-type InAlAs donor layer 高掺杂n型InAlAs给体层InGaAs/InAlAs异质结构场效应晶体管的材料特性
C. Heedt, P. Gottwald, W. Prost, F. Tegude, H. Kunzel, J. Dickmann, H. Dambkes
The impact of donor layer doping on InGaAs/InAlAs HFETs lattice matched to InP substrates is discussed. Several HFET layers with different donor concentrations and doped and undoped surface layers were grown by MBE. Using optical contact lithography, high performance devices (L/sub G/=0.8 mu m, f/sub max/>120 GHz) were prepared for characterization using DC, RF, Hall, TLM, PL, and photocapacitance measurements. High channel concentrations (n/sub s/>4*10/sup 12/ cm/sup -2/) were achieved at very high doping levels in the donor layer (N/sub D/=1*10/sup 19/ cm/sup -3/) and that surface doping does not improve device performance, but increases the output conductance and limits the range of usable drain bias. RF performance is mainly affected by the gate length of the device.<>
讨论了给体层掺杂对与InP衬底匹配的InGaAs/InAlAs hfet晶格的影响。用MBE法生长了几种不同供体浓度的HFET层以及掺杂和未掺杂的表面层。采用光学接触光刻技术,制备了高性能器件(L/sub G/=0.8 μ m, f/sub max/>120 GHz),用于直流、射频、霍尔、TLM、PL和光电容测量。高通道浓度(n/sub - s/>4*10/sup 12/ cm/sup -2/)在给体层(n/sub - D/=1*10/sup 19/ cm/sup -3/)中获得,并且表面掺杂不会改善器件性能,但会增加输出电导并限制可用漏极偏置的范围。射频性能主要受器件栅极长度的影响。
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引用次数: 1
Surface etching for light trapping in encapsulated InP solar cells 封装InP太阳能电池中光捕获的表面蚀刻
P. Jenkins, G. Landis
A technique for reducing the reflectance of glass-encapsulated InP, which is important for increasing the efficiency of solar cells and photodetectors, is described. The technique produces low-angle grooves on the surface by a maskless anisotropic etch. Light reflected from the low angle grooves is trapped by total internal reflection at the glass/air interface and directed back to the InP surface. Measurements indicating a significant decrease in surface reflection are presented.<>
本文描述了一种降低玻璃封装InP的反射率的技术,这对提高太阳能电池和光电探测器的效率非常重要。该技术通过无掩膜各向异性蚀刻在表面上产生低角度凹槽。从低角度凹槽反射的光被玻璃/空气界面的全内反射捕获,并被引导回InP表面。测量结果表明,表面反射显著减少。
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引用次数: 1
期刊
[Proceedings 1991] Third International Conference Indium Phosphide and Related Materials
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