Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310221
Kamala Raghavan Sadagopan, Jian Kang, Y. Ramadass, A. Natarajan
Leveraging the ubiquitous WiFi infrastructure to wirelessly power sensors can enable perpetually powered sensors for several monitoring and asset-tracking IoT applications. Small form factor is often desirable to ensure unobtrusive sensors. However, typical 2.4GHz WiFi output power of <+20dBm implies ∼−30dBm (μW) incident power (assuming free space path loss) at a ∼3m range. This presents a fundamental trade-off since small antenna area can further restrict the wireless power available to the rectifier/harvester. In addition, the time-varying nature of RF wireless powering implies that the energy-harvesting approach must accommodate cold start. In this work, we address the challenge of simultaneously achieving small form factor, μW-scale wireless input sensitivity, and operation at relatively high frequency (2.4GHz) by co-designing the antenna, rectifier, and DC-DC converter, achieving −36dBm input sensitivity for a 0.8V output in primary operating mode and −33dBm sensitivity from cold start with overall 1.97cm2 area (including antenna). In contrast to prior work, the proposed wireless harvesting approach optimally extracts energy from the wireless beacon even with < −30dBm (μW) incident power levels. The harvester consumes 960pW quiescent power while supporting cold start. The feasibility of the proposed approach is demonstrated by harvesting energy from a commercial WiFi node.
{"title":"A 960pW Co-Integrated-Antenna Wireless Energy Harvester for WiFi Backchannel Wireless Powering","authors":"Kamala Raghavan Sadagopan, Jian Kang, Y. Ramadass, A. Natarajan","doi":"10.1109/ISSCC.2018.8310221","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310221","url":null,"abstract":"Leveraging the ubiquitous WiFi infrastructure to wirelessly power sensors can enable perpetually powered sensors for several monitoring and asset-tracking IoT applications. Small form factor is often desirable to ensure unobtrusive sensors. However, typical 2.4GHz WiFi output power of <+20dBm implies ∼−30dBm (μW) incident power (assuming free space path loss) at a ∼3m range. This presents a fundamental trade-off since small antenna area can further restrict the wireless power available to the rectifier/harvester. In addition, the time-varying nature of RF wireless powering implies that the energy-harvesting approach must accommodate cold start. In this work, we address the challenge of simultaneously achieving small form factor, μW-scale wireless input sensitivity, and operation at relatively high frequency (2.4GHz) by co-designing the antenna, rectifier, and DC-DC converter, achieving −36dBm input sensitivity for a 0.8V output in primary operating mode and −33dBm sensitivity from cold start with overall 1.97cm2 area (including antenna). In contrast to prior work, the proposed wireless harvesting approach optimally extracts energy from the wireless beacon even with < −30dBm (μW) incident power levels. The harvester consumes 960pW quiescent power while supporting cold start. The feasibility of the proposed approach is demonstrated by harvesting energy from a commercial WiFi node.","PeriodicalId":6617,"journal":{"name":"2018 IEEE International Solid - State Circuits Conference - (ISSCC)","volume":"44 1","pages":"136-138"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76979278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310286
Ilter Özkaya, A. Cevrero, P. Francese, C. Menolfi, M. Braendli, T. Morf, D. Kuchta, L. Kull, M. Kossel, D. Luu, M. Meghelli, Y. Leblebici, T. Toifl
The increasing bandwidth demand in data-centers requires wireline transceivers supporting >50Gb/s/lane data-rates with low power consumption. Because link utilization in data-centers is <10% for 99% of the links [1] a promising way to reduce power consumption is fine-grained power gating, where the link is powered off during idle time. For rapid on/off functionality to be efficient with short data bursts, the link needs to wake up within a few ns, which is challenging at high speeds. Burst mode operation was previously demonstrated at 25Gb/s with 18.5ns lock-time [2] without power cycling.
{"title":"A 56Gb/s burst-mode NRZ optical receiver with 6.8ns power-on and CDR-Lock time for adaptive optical links in 14nm FinFET CMOS","authors":"Ilter Özkaya, A. Cevrero, P. Francese, C. Menolfi, M. Braendli, T. Morf, D. Kuchta, L. Kull, M. Kossel, D. Luu, M. Meghelli, Y. Leblebici, T. Toifl","doi":"10.1109/ISSCC.2018.8310286","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310286","url":null,"abstract":"The increasing bandwidth demand in data-centers requires wireline transceivers supporting >50Gb/s/lane data-rates with low power consumption. Because link utilization in data-centers is <10% for 99% of the links [1] a promising way to reduce power consumption is fine-grained power gating, where the link is powered off during idle time. For rapid on/off functionality to be efficient with short data bursts, the link needs to wake up within a few ns, which is challenging at high speeds. Burst mode operation was previously demonstrated at 25Gb/s with 18.5ns lock-time [2] without power cycling.","PeriodicalId":6617,"journal":{"name":"2018 IEEE International Solid - State Circuits Conference - (ISSCC)","volume":"36 1","pages":"266-268"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75073139","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310276
Hanli Liu, Dexian Tang, Zheng Sun, W. Deng, H. Ngo, K. Okada, A. Matsuzawa
In a world that has become increasingly connected by the Internet, ultra-low-power (ULP) transceivers (TRX) will be key elements in a variety of short-range network applications. The RF pLl in a TRX needs a significant amount of power due to the phase noise and spurious requirement. Compared with the analog PLLs, an ADPLL is more advantageous in nm-CMOS technologies [1-6]. This paper presents a 2.0-to-2.8GHz 653μW fractional-N ADPLL that achieves −242dB FOM in 65nm CMOS for 2.4GHz ISM band applications. The best power-jitter trade-off is achieved at 981μW using a reference doubler with 535fs jitter and a −56dBc in-band fractional spur, which corresponds to a FOM of −246dB. Thanks to the proposed 10b isolated constant-slope DTC, this ADPLL breaks the −240dB FOM barrier of sub-mW fractional-N ADPLLs.
{"title":"A 0.98mW fractional-N ADPLL using 10b isolated constant-slope DTC with FOM of −246dB for IoT applications in 65nm CMOS","authors":"Hanli Liu, Dexian Tang, Zheng Sun, W. Deng, H. Ngo, K. Okada, A. Matsuzawa","doi":"10.1109/ISSCC.2018.8310276","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310276","url":null,"abstract":"In a world that has become increasingly connected by the Internet, ultra-low-power (ULP) transceivers (TRX) will be key elements in a variety of short-range network applications. The RF pLl in a TRX needs a significant amount of power due to the phase noise and spurious requirement. Compared with the analog PLLs, an ADPLL is more advantageous in nm-CMOS technologies [1-6]. This paper presents a 2.0-to-2.8GHz 653μW fractional-N ADPLL that achieves −242dB FOM in 65nm CMOS for 2.4GHz ISM band applications. The best power-jitter trade-off is achieved at 981μW using a reference doubler with 535fs jitter and a −56dBc in-band fractional spur, which corresponds to a FOM of −246dB. Thanks to the proposed 10b isolated constant-slope DTC, this ADPLL breaks the −240dB FOM barrier of sub-mW fractional-N ADPLLs.","PeriodicalId":6617,"journal":{"name":"2018 IEEE International Solid - State Circuits Conference - (ISSCC)","volume":"1 1","pages":"246-248"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76042435","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310263
Sungpill Choi, Jinsu Lee, K. Lee, H. Yoo
Recently, 3D hand-gesture recognition (HGR) has become an important feature in smart mobile devices, such as head-mounted displays (HMDs) or smartphones for AR/VR applications. A 3D HGR system in Fig. 13.4.1 enables users to interact with virtual 3D objects using depth sensing and hand tracking. However, a previous 3D HGR system, such as Hololens [1], utilized a power consuming time-of-flight (ToF) depth sensor (>2W) limiting 3D HGR operation to less than 3 hours. Even though stereo matching was used instead of ToF for depth sensing with low power consumption [2], it could not provide interaction with virtual 3D objects because depth information was used only for hand segmentation. The HGR-based UI system in smart mobile devices, such as HMDs, must be low power consumption (<10mW), while maintaining real-time operation (<33.3ms). A convolutional neural network (CNN) can be adopted to enhance the accuracy of the low-power stereo matching. The CNN-based HGR system comprises two 6-layer CNNs (stereo) without any pooling layers to preserve geometrical information and an iterative-closest-point/particle-swarm optimization-based (ICP-PSO) hand tracking to acquire 3D coordinates of a user's fingertips and palm from the hand depth. The CNN learns the skin color and texture to detect the hand accurately, comparable to ToF, in the low-power stereo matching system irrespective of variations in external conditions [3]. However, it requires >1000 more MAC operations than previous feature-based stereo depth sensing, which is difficult in real-time with a mobile CPU, and therefore, a dedicated low-power CNN-based stereo matching SoC is required.
{"title":"A 9.02mW CNN-stereo-based real-time 3D hand-gesture recognition processor for smart mobile devices","authors":"Sungpill Choi, Jinsu Lee, K. Lee, H. Yoo","doi":"10.1109/ISSCC.2018.8310263","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310263","url":null,"abstract":"Recently, 3D hand-gesture recognition (HGR) has become an important feature in smart mobile devices, such as head-mounted displays (HMDs) or smartphones for AR/VR applications. A 3D HGR system in Fig. 13.4.1 enables users to interact with virtual 3D objects using depth sensing and hand tracking. However, a previous 3D HGR system, such as Hololens [1], utilized a power consuming time-of-flight (ToF) depth sensor (>2W) limiting 3D HGR operation to less than 3 hours. Even though stereo matching was used instead of ToF for depth sensing with low power consumption [2], it could not provide interaction with virtual 3D objects because depth information was used only for hand segmentation. The HGR-based UI system in smart mobile devices, such as HMDs, must be low power consumption (<10mW), while maintaining real-time operation (<33.3ms). A convolutional neural network (CNN) can be adopted to enhance the accuracy of the low-power stereo matching. The CNN-based HGR system comprises two 6-layer CNNs (stereo) without any pooling layers to preserve geometrical information and an iterative-closest-point/particle-swarm optimization-based (ICP-PSO) hand tracking to acquire 3D coordinates of a user's fingertips and palm from the hand depth. The CNN learns the skin color and texture to detect the hand accurately, comparable to ToF, in the low-power stereo matching system irrespective of variations in external conditions [3]. However, it requires >1000 more MAC operations than previous feature-based stereo depth sensing, which is difficult in real-time with a mobile CPU, and therefore, a dedicated low-power CNN-based stereo matching SoC is required.","PeriodicalId":6617,"journal":{"name":"2018 IEEE International Solid - State Circuits Conference - (ISSCC)","volume":"141 1","pages":"220-222"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89027945","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310219
Jongmin Lee, Donghyeon Lee, Yongmin Lee, Yoonmyung Lee
With the advent of the IoT era, billions of devices are connected to networks, and assuring sufficient security at low cost is a critical concern. Physically Unclonable Functions (PUFs) have drawn increasing attention as key security building blocks for authentication since each PUF circuit has unique challenge response pairs (CRPs). Such uniqueness is achieved by maximizing the effects of process variation using process-sensitive circuits, i.e. PUF cells. Recently reported PUF cell types include cells based on a two-transistor amplifier [1], NAND gate [2], ring oscillator [3], current mirror [4], back-to-back connected inverters [5], and inverter [6]. Regardless of the variation source, PUFs inevitably include CRPs that respond inconsistently when the process variation of the compared element in the CRP is small compared to noise. For example, if the output of a two-transistor amplifier in [1] is near the switching threshold, the output can be inconsistent, resulting in bit error and an unstable CRP. Thus, efforts have focused on stabilizing unstable CRPs. The most straightforward stabilization scheme is temporal majority voting (TMV) [1,5], but the improvement in bit error rate (BER) and stability is limited since it does not directly address the instability of a given CRP. Trimming [2,3,5,6], another widely used approach, improves BER/stability by discarding unstable CRPs. However, stability evaluation is not very accurate, so the number of discarded CRPs can be significant (up to 30% in [3]), increasing the required silicon area for additional CRP generation and making it prohibitive for cost-sensitive IoT applications. This is especially true for weak PUFs. In this paper, a leakage-based PUF that allows lossless stabilization through remapping of unstable PUF cell pairs is presented. BER and stability comparable to, or better than, trimming stabilization method are achieved without discarding CRPs.
{"title":"A 445F2 leakage-based physically unclonable Function with Lossless Stabilization Through Remapping for IoT Security","authors":"Jongmin Lee, Donghyeon Lee, Yongmin Lee, Yoonmyung Lee","doi":"10.1109/ISSCC.2018.8310219","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310219","url":null,"abstract":"With the advent of the IoT era, billions of devices are connected to networks, and assuring sufficient security at low cost is a critical concern. Physically Unclonable Functions (PUFs) have drawn increasing attention as key security building blocks for authentication since each PUF circuit has unique challenge response pairs (CRPs). Such uniqueness is achieved by maximizing the effects of process variation using process-sensitive circuits, i.e. PUF cells. Recently reported PUF cell types include cells based on a two-transistor amplifier [1], NAND gate [2], ring oscillator [3], current mirror [4], back-to-back connected inverters [5], and inverter [6]. Regardless of the variation source, PUFs inevitably include CRPs that respond inconsistently when the process variation of the compared element in the CRP is small compared to noise. For example, if the output of a two-transistor amplifier in [1] is near the switching threshold, the output can be inconsistent, resulting in bit error and an unstable CRP. Thus, efforts have focused on stabilizing unstable CRPs. The most straightforward stabilization scheme is temporal majority voting (TMV) [1,5], but the improvement in bit error rate (BER) and stability is limited since it does not directly address the instability of a given CRP. Trimming [2,3,5,6], another widely used approach, improves BER/stability by discarding unstable CRPs. However, stability evaluation is not very accurate, so the number of discarded CRPs can be significant (up to 30% in [3]), increasing the required silicon area for additional CRP generation and making it prohibitive for cost-sensitive IoT applications. This is especially true for weak PUFs. In this paper, a leakage-based PUF that allows lossless stabilization through remapping of unstable PUF cell pairs is presented. BER and stability comparable to, or better than, trimming stabilization method are achieved without discarding CRPs.","PeriodicalId":6617,"journal":{"name":"2018 IEEE International Solid - State Circuits Conference - (ISSCC)","volume":"31 1","pages":"132-134"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87480774","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310269
H. Chandrakumar, D. Markovic
Closed-loop neuromodulation with simultaneous stimulation and sensing is desired to advance deep brain stimulation (DBS) therapies. However, stimulation generates large artifacts (∼100mV) at the recording sites that saturate traditional front-ends. We present a 15.2b-ENOB CT ΔΣΜ with 187dB FOM, which along with an 8x-gain capacitively coupled chopper instrumentation amplifier (CCIA), realizes a front-end that can digitize neural signals (<2mVpp) from 1Hz to 5kHz in the presence of 200mVpp artifacts. Neural recording front-ends need to function within a power budget of 10μW/ch, input-referred noise of 4–8μVrms in 1Hz-5kHz, DC input impedance Zin, DC>1GΩ and high-pass (HP) cutoff <1Hz [1]. Prior work has addressed power and noise [1]-[2], but has limited dynamic-range and bandwidth (BW), making them incapable of performing true closed-loop operation.
{"title":"A 15.2-ENOB continuous-time ΔΣ ADC for a 200mVpp-linear-input-range neural recording front-end","authors":"H. Chandrakumar, D. Markovic","doi":"10.1109/ISSCC.2018.8310269","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310269","url":null,"abstract":"Closed-loop neuromodulation with simultaneous stimulation and sensing is desired to advance deep brain stimulation (DBS) therapies. However, stimulation generates large artifacts (∼100mV) at the recording sites that saturate traditional front-ends. We present a 15.2b-ENOB CT ΔΣΜ with 187dB FOM, which along with an 8x-gain capacitively coupled chopper instrumentation amplifier (CCIA), realizes a front-end that can digitize neural signals (<2mV<inf>pp</inf>) from 1Hz to 5kHz in the presence of 200mV<inf>pp</inf> artifacts. Neural recording front-ends need to function within a power budget of 10μW/ch, input-referred noise of 4–8μV<inf>rms</inf> in 1Hz-5kHz, DC input impedance Z<inf>in, DC</inf>>1GΩ and high-pass (HP) cutoff <1Hz [1]. Prior work has addressed power and noise [1]-[2], but has limited dynamic-range and bandwidth (BW), making them incapable of performing true closed-loop operation.","PeriodicalId":6617,"journal":{"name":"2018 IEEE International Solid - State Circuits Conference - (ISSCC)","volume":"34 1","pages":"232-234"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87994104","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310338
Jingzhi Zhang, Huihua Liu, Chenxi Zhao, K. Kang
Future cross-network and international roaming are attractive in mm-wave fifth-generation (5G) wireless networks with multiband operations. The generation of an ultra-wide-bandwidth ultra-low-phase-noise (PN) local oscillator (LO) signal in massive multiple-input multiple-output (MIMO) transceivers, which support spectra around 28GHz, 37GHz, and 39GHz, becomes a significant challenge. Injection-locked frequency tripler (ILFT) is a good candidate for LO generation due to its low PN property while suffering from a narrow locking range. Varactors are often used to tune the free-running frequency to increase the bandwidth [1]. However, the PN performance degrades when the target frequency is far away from the free-running frequency, which means a complex calibration mechanism must be applied [2,3]. Meanwhile, an ILFT with such a self-calibration circuit still suffers from a narrow locking range, which cannot support multiband operations. To simplify the system design and meet the multiband requirement, a tuning-less ILFT with an ultra-wide locking range is seen as an appropriate solution for mm-wave multiband 5G applications.
{"title":"A 22.8-to-43.2GHz tuning-less injection-locked frequency tripler using injection-current boosting with 76.4% locking range for multiband 5G applications","authors":"Jingzhi Zhang, Huihua Liu, Chenxi Zhao, K. Kang","doi":"10.1109/ISSCC.2018.8310338","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310338","url":null,"abstract":"Future cross-network and international roaming are attractive in mm-wave fifth-generation (5G) wireless networks with multiband operations. The generation of an ultra-wide-bandwidth ultra-low-phase-noise (PN) local oscillator (LO) signal in massive multiple-input multiple-output (MIMO) transceivers, which support spectra around 28GHz, 37GHz, and 39GHz, becomes a significant challenge. Injection-locked frequency tripler (ILFT) is a good candidate for LO generation due to its low PN property while suffering from a narrow locking range. Varactors are often used to tune the free-running frequency to increase the bandwidth [1]. However, the PN performance degrades when the target frequency is far away from the free-running frequency, which means a complex calibration mechanism must be applied [2,3]. Meanwhile, an ILFT with such a self-calibration circuit still suffers from a narrow locking range, which cannot support multiband operations. To simplify the system design and meet the multiband requirement, a tuning-less ILFT with an ultra-wide locking range is seen as an appropriate solution for mm-wave multiband 5G applications.","PeriodicalId":6617,"journal":{"name":"2018 IEEE International Solid - State Circuits Conference - (ISSCC)","volume":"1 1","pages":"370-372"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89852432","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310360
Lorenzo Lotti, G. LaCaille, A. Niknejad
Multi-user multiple-input multiple-output (MIMO) systems are promising enablers for high-capacity wireless access in next-generation mobile networks. Leveraging antenna arrays at the access point, narrow beams can be steered to different users simultaneously, enhancing spectral efficiency through spatial multiplexing. By employing a number of array elements, M, much larger than the number of users, K, (i.e. massive MIMO), simple linear beamforming algorithms can achieve nearly optimal operation [1]. Operating massive MIMO systems at mm-waves results in compact antenna arrays and wide channel bandwidths. Within the available spectrum, the E-Band communication bandwidth (71 to 76GHz, 81 to 86GHz, and 92 to 95GHz) has recently gained attention for both access and wireless backhaul, due to low oxygen attenuation.
{"title":"A 12mW 70-to-100GHz mixer-first receiver front-end for mm-wave massive-MIMO arrays in 28nm CMOS","authors":"Lorenzo Lotti, G. LaCaille, A. Niknejad","doi":"10.1109/ISSCC.2018.8310360","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310360","url":null,"abstract":"Multi-user multiple-input multiple-output (MIMO) systems are promising enablers for high-capacity wireless access in next-generation mobile networks. Leveraging antenna arrays at the access point, narrow beams can be steered to different users simultaneously, enhancing spectral efficiency through spatial multiplexing. By employing a number of array elements, M, much larger than the number of users, K, (i.e. massive MIMO), simple linear beamforming algorithms can achieve nearly optimal operation [1]. Operating massive MIMO systems at mm-waves results in compact antenna arrays and wide channel bandwidths. Within the available spectrum, the E-Band communication bandwidth (71 to 76GHz, 81 to 86GHz, and 92 to 95GHz) has recently gained attention for both access and wireless backhaul, due to low oxygen attenuation.","PeriodicalId":6617,"journal":{"name":"2018 IEEE International Solid - State Circuits Conference - (ISSCC)","volume":"49 1","pages":"414-416"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90632215","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310336
Heein Yoon, Juyeop Kim, Suneui Park, Younghyun Lim, Yongsun Lee, Jooeun Bang, Kyoohyun Lim, Jaehyouk Choi
To address the increasing demand for high-bandwidth mobile communications, 5G technology is targeted to support data-rates up to 10Gb/s. To reach this goal, one of challenging tasks for wireless transceivers is to generate millimeter-wave (mmW) band Lo signals that have an ultra-low integrated phase noise (IPN). The IPN of an LO signal should be reduced to less than −30dBc to satisfy the EVM requirements of high-order modulations, such as 64-QAM. Figure 23.1.1 shows the frequency spectrum for cellular systems, including existing bands below 6GHz and new mmW bands for 5G. A key goal of the evolution of mobile communications is to ensure interoperability with past-generation standards, and this is expected to continue for 5G. Thus, LO generators eventually will be designed to cover existing bands as well as mmW bands. There are many PLLs that can generate mmW signals directly [1,2], but their ability to achieve low IPN is limited. This is because they are susceptible to increases in in-band phase noise due to their large division numbers and out-of-band phase noise due to the low Q-factors of mmW VCOs. They also require a significant amount of power to operate high-frequency circuits, such as frequency dividers. In addition, they must divide frequencies again to support bands below 6GHz, resulting in the consumption of additional power.
{"title":"A −31dBc integrated-phase-noise 29GHz fractional-N frequency synthesizer supporting multiple frequency bands for backward-compatible 5G using a frequency doubler and injection-locked frequency multipliers","authors":"Heein Yoon, Juyeop Kim, Suneui Park, Younghyun Lim, Yongsun Lee, Jooeun Bang, Kyoohyun Lim, Jaehyouk Choi","doi":"10.1109/ISSCC.2018.8310336","DOIUrl":"https://doi.org/10.1109/ISSCC.2018.8310336","url":null,"abstract":"To address the increasing demand for high-bandwidth mobile communications, 5G technology is targeted to support data-rates up to 10Gb/s. To reach this goal, one of challenging tasks for wireless transceivers is to generate millimeter-wave (mmW) band Lo signals that have an ultra-low integrated phase noise (IPN). The IPN of an LO signal should be reduced to less than −30dBc to satisfy the EVM requirements of high-order modulations, such as 64-QAM. Figure 23.1.1 shows the frequency spectrum for cellular systems, including existing bands below 6GHz and new mmW bands for 5G. A key goal of the evolution of mobile communications is to ensure interoperability with past-generation standards, and this is expected to continue for 5G. Thus, LO generators eventually will be designed to cover existing bands as well as mmW bands. There are many PLLs that can generate mmW signals directly [1,2], but their ability to achieve low IPN is limited. This is because they are susceptible to increases in in-band phase noise due to their large division numbers and out-of-band phase noise due to the low Q-factors of mmW VCOs. They also require a significant amount of power to operate high-frequency circuits, such as frequency dividers. In addition, they must divide frequencies again to support bands below 6GHz, resulting in the consumption of additional power.","PeriodicalId":6617,"journal":{"name":"2018 IEEE International Solid - State Circuits Conference - (ISSCC)","volume":"50 1","pages":"366-368"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90727024","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-02-01DOI: 10.1109/ISSCC.2018.8310193
M. Sakakibara, Koji Ogawa, Shin Sakai, Yasuhisa Tochigi, K. Honda, H. Kikuchi, T. Wada, Y. Kamikubo, T. Miura, M. Nakamizo, Naoki Jyo, Ryo Hayashibara, Y. Furukawa, Shinya Miyata, Satoshi Yamamoto, Y. Ota, H. Takahashi, T. Taura, Y. Oike, K. Tatani, T. Nagano, T. Ezaki, T. Hirayama
Rolling-shutter CMOS image sensors (CISs) are widely used [1,2]. However, the distortion of moving subjects remains an unresolved problem, regardless of the speed at which these sensors are operated. It has been reported that by adopting in-pixel analog memory (MEM) in pixels, a global shutter (GS) can be achieved by saving all pixels simultaneously as stored charges [3,4]. However, as signals from a storage unit are read in a column-wise sequence, a light-shielding structure is required for the MEM to suppress the influence of parasitic light during the reading period. Pixel-parallel ADCs have been reported as methods of implementing GS on a circuit [5,6]. However, these techniques have not been successful in operations on megapixels because they do not address issues such as the timing constraint for reading and writing a digital signal to and from an ADC in a pixel owing to increase in the number of pixels and the increase in the total power consumption of massively parallel comparators (CMs).
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