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2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)最新文献

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Accurate Memory Bitmapping based on Built-in Self-Test: Challenges and Solutions 基于内置自测的精确内存位图:挑战与解决方案
Lin Zhao, Y. Ngow, S. Goh, Y. Chan, Hao Hu, F. Jeff, CC Tay
Bitmapping commonly refers to the localization of memory defects prior to physical inspection. With the pervasive use of embedded memories in modern silicon-on-chips (SoC), memory built-in self-tests (MBIST) become the only means to access and evaluate the memory cells. In the event of a failure, the accuracy of defect isolation depends heavily on the quality of MBIST diagnostic to acquire the correct failing details. Although the workflow to enable diagnostic is well established, challenges exist during actual implementations leading to errors in localization. Based upon the authors’ experiences, this paper seeks to highlight possible areas of concern and describe solutions to overcome them.
位图通常是指在物理检查之前对内存缺陷进行定位。随着嵌入式存储器在现代硅片(SoC)中的广泛应用,存储器内置自检(MBIST)成为访问和评估存储器单元的唯一手段。在发生故障时,缺陷隔离的准确性在很大程度上取决于MBIST诊断的质量,以获得正确的故障细节。尽管启用诊断的工作流程已经很好地建立起来了,但是在实际实现过程中仍然存在一些挑战,这些挑战会导致本地化中的错误。根据作者的经验,本文试图突出可能关注的领域,并描述克服它们的解决方案。
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引用次数: 2
Performance Variability and Analog Behaviors of Memristive Devices with New Transition Metal Carbide 新型过渡金属碳化物记忆电阻器件的性能变异性和模拟行为
Fei Gao, X. Gong, Yufeng Guo, X. Lian, Yi Tong, Yihao Chen, Yuefeng Li, Miaocheng Zhang, Yu Wang, Nan He, Xinyi Shen, Ertao Hu, Xiang Wan
Physical realization of electrical synapses with good reliability aroused great interest due to rapid development of neuromorphic computing. Meanwhile, a new family of two-dimensional transition metal carbides (TMC) has exhibited great potential in performance improvement of electronic devices. However, there are very few investigations for performing synaptic devices using transition metal carbides. Moreover, reliability is crucial for achieving good biological plasticity as well as a controllable synaptic system. In this work, synaptic devices with transition metal carbide were successfully fabricated and reliability has been studied in details. Resistance window of memristor has been able to achieve 7 orders, which provides a possible solution in building artificial neural networks with accurate and efficient learning capability.
由于神经形态计算的迅速发展,具有良好可靠性的电突触的物理实现引起了人们的极大兴趣。同时,一类新的二维过渡金属碳化物(TMC)在提高电子器件性能方面显示出巨大的潜力。然而,使用过渡金属碳化物制作突触装置的研究很少。此外,可靠性对于实现良好的生物可塑性和可控制的突触系统至关重要。本文成功制备了过渡金属碳化物突触器件,并对其可靠性进行了详细的研究。忆阻器的电阻窗口可以达到7阶,为构建具有准确高效学习能力的人工神经网络提供了一种可能的解决方案。
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引用次数: 0
Failure Analysis of the Effect of Hydrogen on GaAs Device 氢对砷化镓器件影响的失效分析
Chao Duan, Zhimin Ding, Zhaoxi Wu, Xiaoqing Wang, Chao Li, Xu Wang
In this paper, we analyzed the reduction of the signal-to-noise ratio of the signal received by the system caused by the failure of a GaAs device. By the means of fault tree, it can be concluded that the failure is in that the operating point of the GaAs device was not selected at the appropriate gate voltage bias position, and at the same time the device gain decreased under the hydrogen effect. Finally, it led to the systematic function failure. A large number of contrast tests concerning the failure components and the samples were designed and implemented during the analysis. The suitable working bias voltage was determined. The degradation impact caused by the hydrogen effect on the GaAs device performance was analyzed. It provides reference for controlling the failure mode of the device during its subsequent production and application.
在本文中,我们分析了由于GaAs器件失效导致系统接收信号信噪比的降低。通过故障树分析,可以得出故障是由于GaAs器件的工作点没有选择在合适的栅极电压偏置位置,同时在氢效应下器件增益降低。最终导致系统功能失效。在分析过程中,设计并实施了大量针对失效构件和试件的对比试验。确定了合适的工作偏置电压。分析了氢效应对砷化镓器件性能的影响。为后续生产和应用中控制该装置的失效模式提供参考。
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引用次数: 0
High Resolution Mapping of Defects at SiO2/SiC Interfaces by Local-DLTS Based on Time-Resolved Scanning Nonlinear Dielectric Microscopy 基于时间分辨扫描非线性介电显微镜的local - dts高分辨率SiO2/SiC界面缺陷映射
Y. Yamagishi, Yasuo Cho
High resolution observation of density of interface states (Hit) at SiO2/4H-SiC interfaces was performed by local deep level transient spectroscopy based on time-resolved scanning nonlinear dielectric microscopy (tr-SNDM). The sizes of the non-uniform contrasts observed in the map of Dit were in the order of several tens of nanometers, which are smaller than the value reported in the previous study (>100 nm). The simulation of the tr-SNDM measurement suggested that the spatial resolution of tr-SNDM is down to the tip radius of the cantilever used for the measurement and can be smaller than the lateral spread of the depletion layer width.
采用基于时间分辨扫描非线性介电显微镜(tr-SNDM)的局部深能级瞬态光谱对SiO2/4H-SiC界面态密度(Hit)进行了高分辨率观测。在Dit图中观察到的非均匀对比大小在几十纳米量级,比以往研究报道的值(>100 nm)要小。对tr-SNDM测量的模拟表明,tr-SNDM的空间分辨率可以降低到用于测量的悬臂梁的尖端半径,并且可以小于耗尽层宽度的横向扩展。
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引用次数: 0
[IPFA 2019 Front matter] [IPFA 2019前沿事项]
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引用次数: 0
Poly-Si Unetch Failure Due to Etching Rate Dependence of Si Orientation 硅取向对蚀刻速率的依赖导致多晶硅非蚀刻失效
D. Nam, Hyunjun Ryu, Shin-Young Chung, Brandon Lee, Sukchan Song, Eunbee Go, Bongsu Chae, A. Kim, Bomi Kim, Hae-Suk Kim, Ji-Sun Yang, SoYeon Han
The origin of poly-Si unetch failure in FinField-effect transistor (FinFET) was defined as an etch rate dependence of a specific Si grain in Si poly crystalline. We analyzed a failure in a FinFET based static random access memory (SRAM). Abnormal point in a passive voltage contrast result was measured by nano-probing and fast Vth shift was detected at a pull down node in SRAM. Transmission electron microscopy (TEM) was applied to find out the cause of the failure, finding that poly-Si in dummy gate was not successfully etched. High-resolution TEM and fast Fourier transformation analysis showed that there was a (111) Si grain. The etch rate of (111) Si is 1–2% of (110) Si, which leads poly-Si unetch failure in gate in a FinFET structure.
FinFET(场效应晶体管)中多晶硅非蚀刻失效的根源被定义为硅多晶中特定硅颗粒的蚀刻速率依赖。我们分析了基于FinFET的静态随机存取存储器(SRAM)的故障。采用纳米探针测量无源电压对比结果中的异常点,并在SRAM的下拉节点处检测到快速的Vth偏移。利用透射电子显微镜(TEM)分析了失效的原因,发现假栅中的多晶硅没有成功蚀刻。高分辨率透射电镜和快速傅里叶变换分析表明,材料中存在(111)Si晶粒。(111) Si的蚀刻速率是(110)Si的1-2%,这导致在FinFET结构的栅极中多晶硅不能蚀刻。
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引用次数: 0
Radiation-Hardened Memory Cell for Ultralow Power Space Applications 用于超低功耗空间应用的抗辐射存储单元
Chunhua Qi, G. Zhai, Guoliang Ma, Tianqi Wang, Chaoming Liu, Liyi Xiao, Heyi Li, Yanqing Zhang, Kairui Guo, Mingxue Huo
In this paper, a novel radiation hardened memory cell for low-voltage operation and ultralow power space applications is proposed, and named as RHDMC. By special layout design, RHDMC can not only tolerate single event upset, but also can mitigate single event multiple upsets. Compared with recently published low power memory cell for low-voltage operation, simulation results (not on experimental data) show that, at the expense of a 129.5% area overhead, the proposed memory cell can provide much lower power consumption during SEU occurrence. To make comparisons, access time and power are also investigated between our proposed memory and LA13T.
本文提出了一种适用于低电压和超低功耗空间应用的新型辐射强化存储单元,命名为RHDMC。通过特殊的布局设计,RHDMC既能承受单次倾覆,又能减轻单次多次倾覆。与最近发表的用于低压工作的低功耗存储单元相比,仿真结果(而不是实验数据)表明,在以129.5%的面积开销为代价的情况下,所提出的存储单元可以在SEU发生时提供更低的功耗。为了进行比较,我们还研究了我们提出的存储器和LA13T之间的访问时间和功耗。
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引用次数: 1
Case study of on-board optical module failure induced by PDMS PDMS引起的星载光模块故障案例研究
Yang Yu, Yuanxin Lee
On-board optical module, which implements photoelectric transformation, has been widely applied in communications industry. Any contamination blocking optical transmission will decrease its power distinctly, therefore, the cleanliness of interface between the OBT(On-board Transceiver) and MT ferrule is in need of great attention. In this paper, we will show a case about on-board optical module failure due to pollution during the production. Through a systematic failure analytical method and using material analysis techniques, we identified the unknown matter and found out the roots of the problem.
板载光模块是实现光电变换的器件,在通信行业中得到了广泛的应用。任何阻挡光传输的污染都会明显降低光传输的功率,因此,OBT(On-board Transceiver)与MT卡套之间的接口清洁度需要引起高度重视。在本文中,我们将展示一个在生产过程中由于污染而导致板载光模块失效的案例。通过系统的失效分析方法和材料分析技术,确定了未知物质,找到了问题的根源。
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引用次数: 0
Using Higher Accelerating Voltage of SEM to Dig Out Implant Defects 利用高加速电压扫描电镜挖掘植入体缺陷
W. Hsu, Yu Hsiang Shu, Chenglong Pan
Implant defects are difficult to discover because they are not quantified easily and not like bridge or open physical defects to find them by standard FA’s instruments We can get electrical proof but hard to prove the relationship with implant defects. Here we highlight a phenomenon by higher electron beam accelerating voltage of SEM (Scanning Electron Microscope), through the different penetration depth of electrical charges in silicon; we can observe the variation of contrast images at abnormal area of SRAM to verify possible implant defects.
由于种植体缺陷不容易被量化,而且不像桥式或开放式的物理缺陷那样容易被标准的FA仪器发现,因此很难被发现,我们可以得到电证据,但很难证明与种植体缺陷的关系。这里我们通过较高的电子束加速电压的SEM(扫描电子显微镜),通过不同的电荷在硅中的渗透深度来突出一个现象;我们可以通过观察SRAM异常区域的对比图像变化来验证植入物是否存在缺陷。
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引用次数: 1
Comparative Study of Total Ionizing Dose Effects on the Silicon-Controlled Rectifier Devices for HV and LV ESD Protections 高压和低压ESD防护用可控硅整流器总电离剂量效应的比较研究
Zhuojun Chen, Wenzhao Lu, Ming Wu, W. Peng, Yun Zeng, Xiangliang Jin
In this paper, the total ionizing dose (TID) effects on low voltage triggering silicon controlled rectifier (LVTSCR) and LDMOS-SCR are studied for low voltage (LV) and high voltage (HV) ESD protections, respectively. They are fabricated in a 5V/24V 0.5-μm CDMOS process and exposed to 60Co gamma rays up to 200 krad(Si). The transmission line pulse (TLP) tests are performed before and after irradiation, and then the ESD performances are compared and discussed.
本文研究了总电离剂量(TID)对低压触发可控硅整流器(LVTSCR)和LDMOS-SCR的影响,分别用于低压和高压ESD保护。它们是在5V/24V 0.5 μm CDMOS工艺中制造的,并暴露在高达200 krad(Si)的60Co伽马射线中。在辐照前后进行了传输线脉冲(TLP)测试,并对辐照前后的ESD性能进行了比较和讨论。
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2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)
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