Pub Date : 1900-01-01DOI: 10.1109/EDAPS.2016.7893167
Tianjian Lu, Jianming Jin
A coupled electrical-thermal-mechanical simulation technique is developed for the reliability analysis of interconnects. The multi-physics simulation is based on the finite element method and characterizes electrical, thermal, and mechanical, aspects of interconnects simultaneously. The multi-physics simulation is capable of analyzing large-scale problems with a significantly enhanced computational efficiency. The efficiency enhancement is achieved by using a domain decomposition scheme called the finite element tearing and interconnecting, parallel computing, and the localized nature of thermal stresses. A numerical example is provided to demonstrate both the capability and efficiency of the proposed simulation.
{"title":"Multiphysics simulation for the reliability analysis of large-scale interconnects","authors":"Tianjian Lu, Jianming Jin","doi":"10.1109/EDAPS.2016.7893167","DOIUrl":"https://doi.org/10.1109/EDAPS.2016.7893167","url":null,"abstract":"A coupled electrical-thermal-mechanical simulation technique is developed for the reliability analysis of interconnects. The multi-physics simulation is based on the finite element method and characterizes electrical, thermal, and mechanical, aspects of interconnects simultaneously. The multi-physics simulation is capable of analyzing large-scale problems with a significantly enhanced computational efficiency. The efficiency enhancement is achieved by using a domain decomposition scheme called the finite element tearing and interconnecting, parallel computing, and the localized nature of thermal stresses. A numerical example is provided to demonstrate both the capability and efficiency of the proposed simulation.","PeriodicalId":191549,"journal":{"name":"2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)","volume":"275 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114484554","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/EDAPS.2016.7893114
Ting-Yi Lin, Tzong-Lin Wu
A compact balanced bandpass filter using two types of LC resonator and quarter-wavelength resonator is proposed in this paper. By taking the advantage of the property of quarter-wavelength resonator and symmetry of the proposed circuit, a bandpass response can be achieved while the band stop response can be achieved at the same frequency band. Parallel LC resonator shunt to the ground is used for the differential bandpass response and series LC resonator shunt to the ground via a resistor is used for the common-mode suppression response. For the purpose of a non-reflected suppression of the common mode noise, a resistor matching to the port impedance is connected to the end of a series LC resonator. By doing so, a single frequency point common-mode noise suppression can be achieved at the desired band. The proposed circuit is analyzed and experimented carefully. The validity of this structure is demonstrated by the experiment result on a 2.4GHz filter.
{"title":"Balanced bandpass filter with reflectionless common-mode suppression","authors":"Ting-Yi Lin, Tzong-Lin Wu","doi":"10.1109/EDAPS.2016.7893114","DOIUrl":"https://doi.org/10.1109/EDAPS.2016.7893114","url":null,"abstract":"A compact balanced bandpass filter using two types of LC resonator and quarter-wavelength resonator is proposed in this paper. By taking the advantage of the property of quarter-wavelength resonator and symmetry of the proposed circuit, a bandpass response can be achieved while the band stop response can be achieved at the same frequency band. Parallel LC resonator shunt to the ground is used for the differential bandpass response and series LC resonator shunt to the ground via a resistor is used for the common-mode suppression response. For the purpose of a non-reflected suppression of the common mode noise, a resistor matching to the port impedance is connected to the end of a series LC resonator. By doing so, a single frequency point common-mode noise suppression can be achieved at the desired band. The proposed circuit is analyzed and experimented carefully. The validity of this structure is demonstrated by the experiment result on a 2.4GHz filter.","PeriodicalId":191549,"journal":{"name":"2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)","volume":"84 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130630780","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/EDAPS.2016.7893159
Shumpei Matsuoka, M. Yasunaga
In the GHz domain, conventional printed circuit board (PCB) trace designs based on the matching of characteristic impedances do not work well for signal integrity (SI) improvement. In order to overcome this difficulty, we previously proposed a novel PCB trace structure, the segmental transmission line (STL), in which the trace design is optimized using genetic algorithms (GAs). In this paper, we apply the STL to the end-to-end transmission systems such as used in PCI-express, USB, SATA, and demonstrate its high effectiveness on the SI improvement by measured eye-diagrams on its prototype. Furthermore, we also measure s-parameters of the prototype and show what design solution the GA found.
{"title":"A high signal integrity interconnect design using a genetic algorithm and its solution analysis: What solution did GA find in time and frequency domain?","authors":"Shumpei Matsuoka, M. Yasunaga","doi":"10.1109/EDAPS.2016.7893159","DOIUrl":"https://doi.org/10.1109/EDAPS.2016.7893159","url":null,"abstract":"In the GHz domain, conventional printed circuit board (PCB) trace designs based on the matching of characteristic impedances do not work well for signal integrity (SI) improvement. In order to overcome this difficulty, we previously proposed a novel PCB trace structure, the segmental transmission line (STL), in which the trace design is optimized using genetic algorithms (GAs). In this paper, we apply the STL to the end-to-end transmission systems such as used in PCI-express, USB, SATA, and demonstrate its high effectiveness on the SI improvement by measured eye-diagrams on its prototype. Furthermore, we also measure s-parameters of the prototype and show what design solution the GA found.","PeriodicalId":191549,"journal":{"name":"2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)","volume":"315 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116110193","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/EDAPS.2016.7893138
H. Huynh, S. Joo, Soyoung Kim
In this paper, the EMI problem of the DC-DC converter is discussed. The power spectrums of the DC-DC converter's nodes are analyzed and the noise scanner method is used to prove that the switching node of the DC-DC converter is the dominant source of EMI. To reduce EMI of DC-DC converters, frequency hopping technique can be applied. The DC-DC converter with frequency hopping technique is fabricated using 180nm CMOS process. The test chip results by IC-stripline and noise scanner methods show a significant improvement in EMI. The EMI reduction amount is 6.87 dB at fundamental switching frequency by applying the frequency hopping technique with IC-stripline measurement.
{"title":"An experimental study of EMI reduction of DC-DC converter with frequency hopping technique","authors":"H. Huynh, S. Joo, Soyoung Kim","doi":"10.1109/EDAPS.2016.7893138","DOIUrl":"https://doi.org/10.1109/EDAPS.2016.7893138","url":null,"abstract":"In this paper, the EMI problem of the DC-DC converter is discussed. The power spectrums of the DC-DC converter's nodes are analyzed and the noise scanner method is used to prove that the switching node of the DC-DC converter is the dominant source of EMI. To reduce EMI of DC-DC converters, frequency hopping technique can be applied. The DC-DC converter with frequency hopping technique is fabricated using 180nm CMOS process. The test chip results by IC-stripline and noise scanner methods show a significant improvement in EMI. The EMI reduction amount is 6.87 dB at fundamental switching frequency by applying the frequency hopping technique with IC-stripline measurement.","PeriodicalId":191549,"journal":{"name":"2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)","volume":"159 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116422238","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/edaps.2016.7893158
R. Achar, Ammar B. Kouki
{"title":"CAD techniques","authors":"R. Achar, Ammar B. Kouki","doi":"10.1109/edaps.2016.7893158","DOIUrl":"https://doi.org/10.1109/edaps.2016.7893158","url":null,"abstract":"","PeriodicalId":191549,"journal":{"name":"2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121592965","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/EDAPS.2016.7893111
A. Engin, I. Ndip, K. Lang, J. Aguirre
Power/ground planes are used for low IR-drop and inductance, but they also cause switching noise coupling globally across chip packages and printed circuit boards. The switching noise coupling is a concern for mixed-signal boards, high-speed I/Os, and electromagnetic compatibility. In GHz frequency regime, switching noise cannot be controlled by off-chip discrete decoupling capacitors due to their inductance. In this paper we introduce the non-overlapping power/ground planes design methodology for filtering of GHz power plane noise. Unlike existing approaches, our approach is simple, has wide bandwidth, and does not increase IR-drop or inductance.
{"title":"Non-overlapping power/ground planes for localized power distribution network design","authors":"A. Engin, I. Ndip, K. Lang, J. Aguirre","doi":"10.1109/EDAPS.2016.7893111","DOIUrl":"https://doi.org/10.1109/EDAPS.2016.7893111","url":null,"abstract":"Power/ground planes are used for low IR-drop and inductance, but they also cause switching noise coupling globally across chip packages and printed circuit boards. The switching noise coupling is a concern for mixed-signal boards, high-speed I/Os, and electromagnetic compatibility. In GHz frequency regime, switching noise cannot be controlled by off-chip discrete decoupling capacitors due to their inductance. In this paper we introduce the non-overlapping power/ground planes design methodology for filtering of GHz power plane noise. Unlike existing approaches, our approach is simple, has wide bandwidth, and does not increase IR-drop or inductance.","PeriodicalId":191549,"journal":{"name":"2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116562340","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/EDAPS.2016.7893118
Chun-Wen Lin, Chi-Kai Shen, Tzong-Lin Wu
An absorptive frequency selective surface (AFSS) which allows signals transmitted in some specific bands is proposed. The transmitting characteristic is rare among AFSS design in the past and can be used to shield the whole package of mixed signal systems. The proposed AFSS provides above 97% absorption at 5.6 GHz in the Wi-Fi band and allows at least half power transmission below 1.84 GHz and above 8.95 GHz, which covers GPS band, most of GSM bands and X-band. Additionally, the proposed work is polarization independent and stable for oblique incident waves up to 45 degrees for both TE and TM polarizations. It is worth to note that clear design concepts and closed-form formulae based on a simple equivalent circuit model are provided, as well as useful design procedures.
{"title":"Design and modeling of an absorptive frequency selective surface with several transmissive bands","authors":"Chun-Wen Lin, Chi-Kai Shen, Tzong-Lin Wu","doi":"10.1109/EDAPS.2016.7893118","DOIUrl":"https://doi.org/10.1109/EDAPS.2016.7893118","url":null,"abstract":"An absorptive frequency selective surface (AFSS) which allows signals transmitted in some specific bands is proposed. The transmitting characteristic is rare among AFSS design in the past and can be used to shield the whole package of mixed signal systems. The proposed AFSS provides above 97% absorption at 5.6 GHz in the Wi-Fi band and allows at least half power transmission below 1.84 GHz and above 8.95 GHz, which covers GPS band, most of GSM bands and X-band. Additionally, the proposed work is polarization independent and stable for oblique incident waves up to 45 degrees for both TE and TM polarizations. It is worth to note that clear design concepts and closed-form formulae based on a simple equivalent circuit model are provided, as well as useful design procedures.","PeriodicalId":191549,"journal":{"name":"2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121006716","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/EDAPS.2016.7893136
Z. Zhou, X. Huang, M. Tong
We propose a three dimensional circuit model that is used for characterizing big power nets in complex flip chip packages. The model is based on block division of a multilayered package. Besides, the model breaks the package into three parts along the z-dimension according to layer stack ups. The model parameters can be evaluated individually and thus rapidly by using commercial software. The model is easy to maintain and update by reassigning power grid.
{"title":"A 3D circuit model for power distribution networks in complex package structures","authors":"Z. Zhou, X. Huang, M. Tong","doi":"10.1109/EDAPS.2016.7893136","DOIUrl":"https://doi.org/10.1109/EDAPS.2016.7893136","url":null,"abstract":"We propose a three dimensional circuit model that is used for characterizing big power nets in complex flip chip packages. The model is based on block division of a multilayered package. Besides, the model breaks the package into three parts along the z-dimension according to layer stack ups. The model parameters can be evaluated individually and thus rapidly by using commercial software. The model is easy to maintain and update by reassigning power grid.","PeriodicalId":191549,"journal":{"name":"2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)","volume":"31 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126003274","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/EDAPS.2016.7893143
Junjie Li, T. Shi, Xing Yu, Chaoliang Cheng, Jinhu Fan, G. Liao, Zirong Tang
In this paper, a novel Cu-Cu bonding method with Ag doped Cu nanosolder paste is proposed. The Cu nanoparticles were synthesized with an efficient method, and the nanosolder paste was fabricated by mixing synthesized Cu nanoparticles, commercial used Ag nanoparticles and organic solution. The shear strengths of Cu-Cu bonding with Ag doped Cu nanosolder paste and pure Cu nanosolder paste at the bonding temperature of 250 °C have been compared, and the highest shear strength in this work could achieve 20.32 MPa, which is suitable for 3D-IC packaging industry. The good performance showed by Ag doped Cu nanosolder paste makes it become a promising substitute of traditional Sn-Ag-Cu solder.
{"title":"Low temperature and low pressure Cu-Cu bonding with Ag doped Cu nanosolder paste","authors":"Junjie Li, T. Shi, Xing Yu, Chaoliang Cheng, Jinhu Fan, G. Liao, Zirong Tang","doi":"10.1109/EDAPS.2016.7893143","DOIUrl":"https://doi.org/10.1109/EDAPS.2016.7893143","url":null,"abstract":"In this paper, a novel Cu-Cu bonding method with Ag doped Cu nanosolder paste is proposed. The Cu nanoparticles were synthesized with an efficient method, and the nanosolder paste was fabricated by mixing synthesized Cu nanoparticles, commercial used Ag nanoparticles and organic solution. The shear strengths of Cu-Cu bonding with Ag doped Cu nanosolder paste and pure Cu nanosolder paste at the bonding temperature of 250 °C have been compared, and the highest shear strength in this work could achieve 20.32 MPa, which is suitable for 3D-IC packaging industry. The good performance showed by Ag doped Cu nanosolder paste makes it become a promising substitute of traditional Sn-Ag-Cu solder.","PeriodicalId":191549,"journal":{"name":"2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130325186","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/EDAPS.2016.7893134
Venkatesh Avula, A. Zadehgol
Frequency-domain models are often need to be converted to macromodels by approximating them as rational functions. Pole/Residue Equivalent System Solver (PRESS) is a method for such fitting of frequency response as poles/residues. In this paper, a modified PRESS method using non-consecutive sample subset based local fitting is presented. The proposed method reduces the number of iterations required, consequently improving the model order. A test case of package — signal and power plane interconnects — is demonstrated. The results show that the proposed method generates compact macromodels.
{"title":"Coarse-to-fine malleable Pole/Residue Equivalent System Solver (COMPRESS)","authors":"Venkatesh Avula, A. Zadehgol","doi":"10.1109/EDAPS.2016.7893134","DOIUrl":"https://doi.org/10.1109/EDAPS.2016.7893134","url":null,"abstract":"Frequency-domain models are often need to be converted to macromodels by approximating them as rational functions. Pole/Residue Equivalent System Solver (PRESS) is a method for such fitting of frequency response as poles/residues. In this paper, a modified PRESS method using non-consecutive sample subset based local fitting is presented. The proposed method reduces the number of iterations required, consequently improving the model order. A test case of package — signal and power plane interconnects — is demonstrated. The results show that the proposed method generates compact macromodels.","PeriodicalId":191549,"journal":{"name":"2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127816797","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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