B. Mcdermott, E. Gertner, S. Pittman, C. Seabury, M. Chang
Heterojunction bipolar transistors (HBTs) need heavily doped p-type regions. However, at high concentrations (>10/sup 19/ cm/sup -3/), most p-type dopants diffuse into other regions of the device, ruining performance and preventing stable, reliable operation. The discovery that carbon as a p-type dopant does not significantly diffuse has lead to reliable operation of GaAs-based HBTs. For the first time, carbon-doped double heterojunction InP/GaAsSb/InP HBTs have been fabricated (emitter area of approximately 70/spl times/70 /spl mu/m/sup 2/). The base doping was P=4/spl times/10/sup 19/ cm/sup -3/. Base thickness was varied from 350 /spl Aring/ to 1500 /spl Aring/, giving sheet resistances of 850 to 200 /spl Omega//sq. The devices had DC current gains ranging from 5 to 45 that scaled sheet resistance. While these gains are low, they are comparable to the best InP/GaInAs HBTs fabricated, where the gain is limited due to Auger recombination in highly doped bases. BV/sub ceo/ is on the order of 6 volts. The typical turn-on voltage for both emitter-base and base-collector junctions is approximately 0.4 V, even with the emitter-base junction grown nominally abrupt: i.e., no undoped setbacks or intentionally graded layers were used for these structures. The authors report on the growth, fabrication, and properties of the MOCVD-grown carbon-doped InP/GaAsSb HBTs.
{"title":"Carbon doped InP/GaAsSb HBTs via MOCVD","authors":"B. Mcdermott, E. Gertner, S. Pittman, C. Seabury, M. Chang","doi":"10.1109/DRC.1995.496284","DOIUrl":"https://doi.org/10.1109/DRC.1995.496284","url":null,"abstract":"Heterojunction bipolar transistors (HBTs) need heavily doped p-type regions. However, at high concentrations (>10/sup 19/ cm/sup -3/), most p-type dopants diffuse into other regions of the device, ruining performance and preventing stable, reliable operation. The discovery that carbon as a p-type dopant does not significantly diffuse has lead to reliable operation of GaAs-based HBTs. For the first time, carbon-doped double heterojunction InP/GaAsSb/InP HBTs have been fabricated (emitter area of approximately 70/spl times/70 /spl mu/m/sup 2/). The base doping was P=4/spl times/10/sup 19/ cm/sup -3/. Base thickness was varied from 350 /spl Aring/ to 1500 /spl Aring/, giving sheet resistances of 850 to 200 /spl Omega//sq. The devices had DC current gains ranging from 5 to 45 that scaled sheet resistance. While these gains are low, they are comparable to the best InP/GaInAs HBTs fabricated, where the gain is limited due to Auger recombination in highly doped bases. BV/sub ceo/ is on the order of 6 volts. The typical turn-on voltage for both emitter-base and base-collector junctions is approximately 0.4 V, even with the emitter-base junction grown nominally abrupt: i.e., no undoped setbacks or intentionally graded layers were used for these structures. The authors report on the growth, fabrication, and properties of the MOCVD-grown carbon-doped InP/GaAsSb HBTs.","PeriodicalId":326645,"journal":{"name":"1995 53rd Annual Device Research Conference Digest","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115555989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Summary form only given. The Insulated Gate Bipolar Transistor (IGBT) has become the dominant power MOS-gated switching device of choice for medium power electronics applications. One of the inherent weaknesses of the IGBT is the presence of a parasitic four-layer npnp thyristor structure that must be suppressed from turning on to retain gate-controlled operation. Several techniques, notably the cell design and counterdoping of the MOS channel, have been proposed to improving the latching suppression, particularly at elevated temperatures. In this paper, a novel latchup improvement technique, which adds indium in the p body region to decrease the sheet resistance of that region under the n/sup +/ emitter without a concomittant increase of threshold voltage, is proposed and demonstrated experimentally.
{"title":"Improvement of IGBT latching performance by indium doping","authors":"Z. Shen, V. Parthasarathy, T. Chow","doi":"10.1109/DRC.1995.496293","DOIUrl":"https://doi.org/10.1109/DRC.1995.496293","url":null,"abstract":"Summary form only given. The Insulated Gate Bipolar Transistor (IGBT) has become the dominant power MOS-gated switching device of choice for medium power electronics applications. One of the inherent weaknesses of the IGBT is the presence of a parasitic four-layer npnp thyristor structure that must be suppressed from turning on to retain gate-controlled operation. Several techniques, notably the cell design and counterdoping of the MOS channel, have been proposed to improving the latching suppression, particularly at elevated temperatures. In this paper, a novel latchup improvement technique, which adds indium in the p body region to decrease the sheet resistance of that region under the n/sup +/ emitter without a concomittant increase of threshold voltage, is proposed and demonstrated experimentally.","PeriodicalId":326645,"journal":{"name":"1995 53rd Annual Device Research Conference Digest","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121303650","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
We have developed a new HBT process to fabricate submicron emitter geometries for applications requiring ultra-low-power consumption and very high-speed performance. We have made devices with an emitter area of approximately 0.3 /spl mu/m/sup 2/ which exhibit a maximum frequency of oscillation, f/sub max/ of 99 GHz. These transistors are more than an order of magnitude smaller than our current baseline transistors. We have developed a fully self-aligned process to minimize the lateral dimensions of the device associated with the base and collector contact regions. In this novel approach the emitter, base and collector ohmic metals are all self-aligned to the emitter mesa. Furthermore, the three ohmic contacts, i.e. emitter, base, and collector are defined and deposited in a single metallization step thereby simplifying the fabrication process. The simplified process and higher packing density (from scaled transistors and interconnects) should lead to better yield for low-power ICs.
{"title":"Submicron fully self-aligned AlInAs/GaInAs HBTs for low-power applications","authors":"M. Hafizi, W. Stanchina, H. Sun","doi":"10.1109/DRC.1995.496279","DOIUrl":"https://doi.org/10.1109/DRC.1995.496279","url":null,"abstract":"We have developed a new HBT process to fabricate submicron emitter geometries for applications requiring ultra-low-power consumption and very high-speed performance. We have made devices with an emitter area of approximately 0.3 /spl mu/m/sup 2/ which exhibit a maximum frequency of oscillation, f/sub max/ of 99 GHz. These transistors are more than an order of magnitude smaller than our current baseline transistors. We have developed a fully self-aligned process to minimize the lateral dimensions of the device associated with the base and collector contact regions. In this novel approach the emitter, base and collector ohmic metals are all self-aligned to the emitter mesa. Furthermore, the three ohmic contacts, i.e. emitter, base, and collector are defined and deposited in a single metallization step thereby simplifying the fabrication process. The simplified process and higher packing density (from scaled transistors and interconnects) should lead to better yield for low-power ICs.","PeriodicalId":326645,"journal":{"name":"1995 53rd Annual Device Research Conference Digest","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121526833","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
We report a novel electro-mechanical tunable micro Fabry-Perot Filter (FPF) for applications in flat panel colour displays, sensors (acceleration, pressure etc.) and communications. The micro FPF is fabricated on both silicon and glass substrates. The device offers many advantages over existing surface micromachined optical technologies. The fabrication process is simple, monolithic, and does not require any high temperature step. The present device can be used in many different applications. For instance, it can be used as a colour display device by using collimated white light and appropriate mirror separation. This device requires neither as sophisticated optics nor as intense signal processing as the Digital Mirror Device (DMD).
{"title":"Electro-mechanically tunable micro Fabry-Perot filter array","authors":"A. Tran, D. Haronian, N. Mcdonald, Y. Lo","doi":"10.1109/DRC.1995.496298","DOIUrl":"https://doi.org/10.1109/DRC.1995.496298","url":null,"abstract":"We report a novel electro-mechanical tunable micro Fabry-Perot Filter (FPF) for applications in flat panel colour displays, sensors (acceleration, pressure etc.) and communications. The micro FPF is fabricated on both silicon and glass substrates. The device offers many advantages over existing surface micromachined optical technologies. The fabrication process is simple, monolithic, and does not require any high temperature step. The present device can be used in many different applications. For instance, it can be used as a colour display device by using collimated white light and appropriate mirror separation. This device requires neither as sophisticated optics nor as intense signal processing as the Digital Mirror Device (DMD).","PeriodicalId":326645,"journal":{"name":"1995 53rd Annual Device Research Conference Digest","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133426542","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Shen, S. Tehrani, H. Goronkin, G. Kramer, R. Tsui
Proposes and demonstrates an XNOR device based on the resonant interband tunneling FET which combines an InAs/AlSb/GaSb resonant interband tunneling diode (RITD) with pseudomorphic InGaAs-channel field effect transistors (FET).
{"title":"An XNOR device in hybrid InAs/AlSb/GaSb and InGaAs material systems","authors":"J. Shen, S. Tehrani, H. Goronkin, G. Kramer, R. Tsui","doi":"10.1109/DRC.1995.496271","DOIUrl":"https://doi.org/10.1109/DRC.1995.496271","url":null,"abstract":"Proposes and demonstrates an XNOR device based on the resonant interband tunneling FET which combines an InAs/AlSb/GaSb resonant interband tunneling diode (RITD) with pseudomorphic InGaAs-channel field effect transistors (FET).","PeriodicalId":326645,"journal":{"name":"1995 53rd Annual Device Research Conference Digest","volume":"195 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132798842","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this work, the performance of polysilicon TFTs has been improved for the first time by introduction of a thin polycrystalline silicon-germanium alloy layer sandwiched between thin polysilicon films in the channel of the TFTs. The bandgap discontinuity in the valence band between polysilicon and SiGe confines holes in the middle of the channel away from the high defect-density polysilicon-oxide interface. From the process point of view, it is better to have a sandwich layer than having SiGe along the entire depth of the channel because oxides on SiGe are known to be of bad quality.
{"title":"A novel Si/SiGe sandwich polysilicon TFT for SRAM applications","authors":"I. Manna, L. Jung, S. Banerjee","doi":"10.1109/DRC.1995.496309","DOIUrl":"https://doi.org/10.1109/DRC.1995.496309","url":null,"abstract":"In this work, the performance of polysilicon TFTs has been improved for the first time by introduction of a thin polycrystalline silicon-germanium alloy layer sandwiched between thin polysilicon films in the channel of the TFTs. The bandgap discontinuity in the valence band between polysilicon and SiGe confines holes in the middle of the channel away from the high defect-density polysilicon-oxide interface. From the process point of view, it is better to have a sandwich layer than having SiGe along the entire depth of the channel because oxides on SiGe are known to be of bad quality.","PeriodicalId":326645,"journal":{"name":"1995 53rd Annual Device Research Conference Digest","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114580837","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Although InP-based HBTs have shown excellent RF performance, the low breakdown and Early voltages of InGaAs collectors have limited their insertion into high linearity and power amplifiers. InAlAs/InGaAs NpN double-HBTs with compositionally graded quaternary InGaAlAs collectors realized a high BVceo of 20V with minimal carrier blocking up to high current densities. The same device exhibited an ft and fmax of 58 GHz and 140 GHz, respectively, which is comparable to otherwise identical InGaAs collector devices.
{"title":"A 140 GHz f/sub max/ InAlAs/InGaAs pulse-doped InGaAlAs quaternary collector HBT with a 20 V BVceo","authors":"J. Cowles, L. Tran, T. Block, D. Streit, A. Oki","doi":"10.1109/DRC.1995.496281","DOIUrl":"https://doi.org/10.1109/DRC.1995.496281","url":null,"abstract":"Although InP-based HBTs have shown excellent RF performance, the low breakdown and Early voltages of InGaAs collectors have limited their insertion into high linearity and power amplifiers. InAlAs/InGaAs NpN double-HBTs with compositionally graded quaternary InGaAlAs collectors realized a high BVceo of 20V with minimal carrier blocking up to high current densities. The same device exhibited an ft and fmax of 58 GHz and 140 GHz, respectively, which is comparable to otherwise identical InGaAs collector devices.","PeriodicalId":326645,"journal":{"name":"1995 53rd Annual Device Research Conference Digest","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114422691","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Corroboration of a revised view of recombination in 1.3 /spl mu/m InGaAsP lasers is provided by quantitative measurements of the spontaneous emission imaged through substrate metallization windows. These data exhibit sensitivity to the acceptor concentration in the active layer via the dependence of spontaneous emission intensity on the junction voltage. The data demonstrate explicitly the dependence of the spontaneous emission intensity on the excess hole concentration, accurately described by the bimolecular formula, but contrary to the linear dependence inferred from the analysis of uncorrected lifetime data. This analysis constitutes a DC method for estimating the acceptor concentration in bulk-active lasers.
1.3 /spl μ m /m InGaAsP激光器的自发发射成像通过衬底金属化窗口的定量测量，证实了重新组合的修正观点。这些数据通过自发发射强度对结电压的依赖表现出对活性层中受体浓度的敏感性。这些数据明确地证明了自发发射强度与多余空穴浓度的依赖关系，这是由双分子式精确描述的，但与从未经校正的寿命数据分析中推断的线性依赖关系相反。这一分析构成了估计体源激光器中受体浓度的直流方法。
{"title":"Effect of device impedance on the measurement of carrier lifetime and carrier density in semiconductor lasers","authors":"E. Flynn","doi":"10.1109/DRC.1995.496305","DOIUrl":"https://doi.org/10.1109/DRC.1995.496305","url":null,"abstract":"Corroboration of a revised view of recombination in 1.3 /spl mu/m InGaAsP lasers is provided by quantitative measurements of the spontaneous emission imaged through substrate metallization windows. These data exhibit sensitivity to the acceptor concentration in the active layer via the dependence of spontaneous emission intensity on the junction voltage. The data demonstrate explicitly the dependence of the spontaneous emission intensity on the excess hole concentration, accurately described by the bimolecular formula, but contrary to the linear dependence inferred from the analysis of uncorrected lifetime data. This analysis constitutes a DC method for estimating the acceptor concentration in bulk-active lasers.","PeriodicalId":326645,"journal":{"name":"1995 53rd Annual Device Research Conference Digest","volume":"120 1-2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116241043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Simulates silicon-based FETs having a radically new architecture, one which could eventually permit scaling of overall device dimensions to 500A or less while simultaneously eliminating the large-area contacts and isolation required in conventional MOSFETs. This approach assumes that it will be possible to selectively pattern epitaxial films into the silicon substrate at nanometer resolution, and to subsequently overgrow these patterns with heterolayer structures. Selective epitaxial metallization of this type can potentially provide the basis for a wide variety of nanoscale devices in which transport occurs through appropriately designed heterolayers in the vertical (growth) direction under control of a gate electrode.
{"title":"A nanoscale vertical-tunneling FET","authors":"J. Tucker, C. Wang, T. Shen","doi":"10.1109/DRC.1995.496234","DOIUrl":"https://doi.org/10.1109/DRC.1995.496234","url":null,"abstract":"Simulates silicon-based FETs having a radically new architecture, one which could eventually permit scaling of overall device dimensions to 500A or less while simultaneously eliminating the large-area contacts and isolation required in conventional MOSFETs. This approach assumes that it will be possible to selectively pattern epitaxial films into the silicon substrate at nanometer resolution, and to subsequently overgrow these patterns with heterolayer structures. Selective epitaxial metallization of this type can potentially provide the basis for a wide variety of nanoscale devices in which transport occurs through appropriately designed heterolayers in the vertical (growth) direction under control of a gate electrode.","PeriodicalId":326645,"journal":{"name":"1995 53rd Annual Device Research Conference Digest","volume":"211 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123017413","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Hu, M. Peters, D. Young, A. Gossard, L. Coldren
We report a significant reduction of threshold current in lasers from a material which has two strained-layer In/sub 0.2/Ga/sub 0.8/As/GaAs QW inside a linearly-graded-index separate-confinement waveguide structure. The ridges were etched by Cl/sub 2/ reactive ion etching. Self-aligned Si deposition and Zn diffusion were used in the device fabrication. The resultant active stripe width was controlled by the Si diffusion time. For example, a 0.3-/spl mu/m-wide active stripe was achieved from the originally 1.5-/spl mu/m-wide device after a 90 min diffusion at 850 C. As a result, threshold currents as low as 0.7 mA for pulsed operation and 0.9 mA for cw operation have been obtained from an uncoated 137-/spl mu/m-long and 0.3-/spl mu/m-wide device without special heat sinking treatment.
{"title":"Submilliamp-threshold InGaAs/GaAs quantum-well ridge-waveguide lasers with impurity-induced disordering","authors":"S. Hu, M. Peters, D. Young, A. Gossard, L. Coldren","doi":"10.1109/DRC.1995.496303","DOIUrl":"https://doi.org/10.1109/DRC.1995.496303","url":null,"abstract":"We report a significant reduction of threshold current in lasers from a material which has two strained-layer In/sub 0.2/Ga/sub 0.8/As/GaAs QW inside a linearly-graded-index separate-confinement waveguide structure. The ridges were etched by Cl/sub 2/ reactive ion etching. Self-aligned Si deposition and Zn diffusion were used in the device fabrication. The resultant active stripe width was controlled by the Si diffusion time. For example, a 0.3-/spl mu/m-wide active stripe was achieved from the originally 1.5-/spl mu/m-wide device after a 90 min diffusion at 850 C. As a result, threshold currents as low as 0.7 mA for pulsed operation and 0.9 mA for cw operation have been obtained from an uncoated 137-/spl mu/m-long and 0.3-/spl mu/m-wide device without special heat sinking treatment.","PeriodicalId":326645,"journal":{"name":"1995 53rd Annual Device Research Conference Digest","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122534335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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