Pub Date : 2021-08-09DOI: 10.1109/MWSCAS47672.2021.9531691
Suwan Kim, Taewhan Kim
We propose a practical approach to the cell replacement problem for resolving the pin inaccessibility in the ECO (engineering-change-order) routing stage. The prior cell replacement method performs in two steps: (i) it prepares a subsidiary (i.e., alternative) cell library that includes for each cell type a set of diverse cell layouts. Then, (ii) it iteratively tries to replace the cells of routing failures with some cells in the subsidiary library during ECO routing in order to fix the routing failures. In this work, we downsize the subsidiary library produced in step (i) to speed up the sequential and time-consuming process of step (ii). Precisely, we propose a function based on the well-known formulation of Levenshtein distance to measure the degree of the pin topology difference between the layout of a cell type in the target library and a layout of the same type in the subsidiary library. Then, we update the subsidiary library to include, for each cell type, exactly one layout that has the biggest pin topology difference. Through experiments with benchmark circuits, it is shown that using the subsidiary library produced by our topology difference formulation enables to reduce the number of trials of cell replacements significantly over the conventional method while fixing almost the same amount of routing violations.
{"title":"Practical Approach to Cell Replacement for Resolving Pin Inaccessibility","authors":"Suwan Kim, Taewhan Kim","doi":"10.1109/MWSCAS47672.2021.9531691","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531691","url":null,"abstract":"We propose a practical approach to the cell replacement problem for resolving the pin inaccessibility in the ECO (engineering-change-order) routing stage. The prior cell replacement method performs in two steps: (i) it prepares a subsidiary (i.e., alternative) cell library that includes for each cell type a set of diverse cell layouts. Then, (ii) it iteratively tries to replace the cells of routing failures with some cells in the subsidiary library during ECO routing in order to fix the routing failures. In this work, we downsize the subsidiary library produced in step (i) to speed up the sequential and time-consuming process of step (ii). Precisely, we propose a function based on the well-known formulation of Levenshtein distance to measure the degree of the pin topology difference between the layout of a cell type in the target library and a layout of the same type in the subsidiary library. Then, we update the subsidiary library to include, for each cell type, exactly one layout that has the biggest pin topology difference. Through experiments with benchmark circuits, it is shown that using the subsidiary library produced by our topology difference formulation enables to reduce the number of trials of cell replacements significantly over the conventional method while fixing almost the same amount of routing violations.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"34 1","pages":"224-227"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90809799","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-08-09DOI: 10.1109/MWSCAS47672.2021.9531902
Rachel Fisher, Karen S. Anderson, J. Christen
Colorimetric assays are an important tool in point-of-care testing that offers several advantages such as rapid response times and inexpensive costs. A factor that currently limits their use is objective measures to determine results. Current solutions consist of creating a test reader that standardizes the conditions the strip is under before measuring. However, this increases the cost and decreases the portability of these assays. The focus of this study is to train a convolutional neural network (CNN) that can objectively determine results of colorimetric assays under varying conditions. To ensure the flexibility of the model to several types of colorimetric assays, three models are trained on the same CNN. The images these models are trained on consist of positive and negative images of ETG (99.87% positive classification, 99.96% negative classification), fentanyl (99.60% positive classification, 99.56% negative classification), and HPV antibody (99.86% positive classification, 100% negative classification) strips taken under different lighting and background conditions. A fourth model is trained on an image set composed of all three strip types with the lowest classification accuracy being 99.11%.
{"title":"Using Machine Learning to Objectively Determine Colorimetric Assay Results from Cell Phone Photos Taken Under Ambient Lighting","authors":"Rachel Fisher, Karen S. Anderson, J. Christen","doi":"10.1109/MWSCAS47672.2021.9531902","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531902","url":null,"abstract":"Colorimetric assays are an important tool in point-of-care testing that offers several advantages such as rapid response times and inexpensive costs. A factor that currently limits their use is objective measures to determine results. Current solutions consist of creating a test reader that standardizes the conditions the strip is under before measuring. However, this increases the cost and decreases the portability of these assays. The focus of this study is to train a convolutional neural network (CNN) that can objectively determine results of colorimetric assays under varying conditions. To ensure the flexibility of the model to several types of colorimetric assays, three models are trained on the same CNN. The images these models are trained on consist of positive and negative images of ETG (99.87% positive classification, 99.96% negative classification), fentanyl (99.60% positive classification, 99.56% negative classification), and HPV antibody (99.86% positive classification, 100% negative classification) strips taken under different lighting and background conditions. A fourth model is trained on an image set composed of all three strip types with the lowest classification accuracy being 99.11%.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"96 1","pages":"467-470"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87519563","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-08-09DOI: 10.1109/MWSCAS47672.2021.9531736
F. Yuan
This paper provide a comparative study of design techniques for bootstrapping in the sample-and-hold of energy-efficient successive approximation register analog-to-digital converters (SAR ADCs). The need for bootstrapping is investigated. It is followed with an in-depth examination of the design, advantages, and disadvantages of bootstrapped switches. Design considerations in choosing bootstrapping capacitors and negative-gating capacitor in low-leakage bootstrapped switches are investigated. The nonlinearity and power consumption of bootstrapped switches are compared and the impact of supply voltage reduction on the nonlinearity and power consumption of bootstrapped switches is investigated utilizing TSMC 130 nm 1.2 V CMOS technology.
本文对节能逐次逼近寄存器模数转换器(SAR adc)的采样保持自举设计技术进行了比较研究。研究了自举的必要性。接下来是对自举开关的设计、优点和缺点的深入研究。研究了低漏自举开关中自举电容和负门控电容选择的设计考虑。比较了自举开关的非线性和功耗，并利用台积电130 nm 1.2 V CMOS技术研究了电源电压降低对自举开关非线性和功耗的影响。
{"title":"Bootstrapping Techniques for Energy-Efficient SAR ADCs : A State-of-the-Art Review","authors":"F. Yuan","doi":"10.1109/MWSCAS47672.2021.9531736","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531736","url":null,"abstract":"This paper provide a comparative study of design techniques for bootstrapping in the sample-and-hold of energy-efficient successive approximation register analog-to-digital converters (SAR ADCs). The need for bootstrapping is investigated. It is followed with an in-depth examination of the design, advantages, and disadvantages of bootstrapped switches. Design considerations in choosing bootstrapping capacitors and negative-gating capacitor in low-leakage bootstrapped switches are investigated. The nonlinearity and power consumption of bootstrapped switches are compared and the impact of supply voltage reduction on the nonlinearity and power consumption of bootstrapped switches is investigated utilizing TSMC 130 nm 1.2 V CMOS technology.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"8 1","pages":"575-578"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84299501","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-08-09DOI: 10.1109/MWSCAS47672.2021.9531782
Genevieve Sapijaszko, W. Mikhael
Image recognition systems are critical components in numerous applications, often requiring real-time implementations that are both fast and accurate. Convolutional Neural Networks (CNNs) are an emerging tool used to meet these conditions. However, in image recognition, CNNs are often designed to fit general image datasets leading to implementations that may have more layers and nodes than are warranted in particular applications. In this paper, a neuroevolution algorithm is developed to reduce a CNN architecture’s complexity by determining the minimal CNN structure and hyperparameters needed to fit a traffic sign dataset. A neuroevolution algorithm is employed to tune the CNN’s parameters and topology to enable a more efficient parameter space search. Results show that despite reducing complexity, the system still maintains high recognition accuracy compared to popular CNNs, such as AlexNet, VGGNet 16, VGGNet 19, GoogleNet, ResNet 50, and ResNet 101.
{"title":"Designing Convolutional Neural Networks Using Neuroevolution for Traffic Sign Datasets","authors":"Genevieve Sapijaszko, W. Mikhael","doi":"10.1109/MWSCAS47672.2021.9531782","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531782","url":null,"abstract":"Image recognition systems are critical components in numerous applications, often requiring real-time implementations that are both fast and accurate. Convolutional Neural Networks (CNNs) are an emerging tool used to meet these conditions. However, in image recognition, CNNs are often designed to fit general image datasets leading to implementations that may have more layers and nodes than are warranted in particular applications. In this paper, a neuroevolution algorithm is developed to reduce a CNN architecture’s complexity by determining the minimal CNN structure and hyperparameters needed to fit a traffic sign dataset. A neuroevolution algorithm is employed to tune the CNN’s parameters and topology to enable a more efficient parameter space search. Results show that despite reducing complexity, the system still maintains high recognition accuracy compared to popular CNNs, such as AlexNet, VGGNet 16, VGGNet 19, GoogleNet, ResNet 50, and ResNet 101.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"34 1","pages":"305-308"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88143590","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-08-09DOI: 10.1109/MWSCAS47672.2021.9531687
Saleh Bunaiyan, Feras Al-Dirini
The unprecedented rise of the internet-of-things (IoT) has led to an enormous rate of data generation from sensors and IoT devices, calling for an urgent need for more intelligent approaches of data acquisition from such sensors. This paper proposes an event-based sampling technique for selective acquisition of event-data from sparse sensor signals, produced by remote sensors and IoT devices. The proposed technique simultaneously combines advantageous features of uniform (synchronous) and non-uniform (asynchronous) techniques. In the proposed approach, event-detection is achieved in real-time in the analog domain, prior to analog-to-digital conversion (ADC) and digital processing, by means of an analog event-detection (AED) circuit. A proof-of-concept design for the AED circuit is implemented and analyzed through experiments and extensive SPICE simulations, demonstrating its capability of detecting the onset of an event in real-time; with speeds on the order of microseconds. Such rapid analog event-detection can enable the real-time control of the sampling process, such that no sampling would occur unless there is an event, giving rise to a richer information content in the acquired data. Moreover, the proposed technique allows all system blocks to remain in sleep-mode until an event is detected, dramatically reducing their overall power consumption. The impact of the proposed technique is further demonstrated on an important industrial application; seismic data acquisition, by testing the design - through SPICE simulation – on real seismic data obtained from seismic surveys for oil and gas exploration.
{"title":"Real-Time Analog Event-Detection for Event-Based Synchronous Sampling of Sparse Sensor Signals","authors":"Saleh Bunaiyan, Feras Al-Dirini","doi":"10.1109/MWSCAS47672.2021.9531687","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531687","url":null,"abstract":"The unprecedented rise of the internet-of-things (IoT) has led to an enormous rate of data generation from sensors and IoT devices, calling for an urgent need for more intelligent approaches of data acquisition from such sensors. This paper proposes an event-based sampling technique for selective acquisition of event-data from sparse sensor signals, produced by remote sensors and IoT devices. The proposed technique simultaneously combines advantageous features of uniform (synchronous) and non-uniform (asynchronous) techniques. In the proposed approach, event-detection is achieved in real-time in the analog domain, prior to analog-to-digital conversion (ADC) and digital processing, by means of an analog event-detection (AED) circuit. A proof-of-concept design for the AED circuit is implemented and analyzed through experiments and extensive SPICE simulations, demonstrating its capability of detecting the onset of an event in real-time; with speeds on the order of microseconds. Such rapid analog event-detection can enable the real-time control of the sampling process, such that no sampling would occur unless there is an event, giving rise to a richer information content in the acquired data. Moreover, the proposed technique allows all system blocks to remain in sleep-mode until an event is detected, dramatically reducing their overall power consumption. The impact of the proposed technique is further demonstrated on an important industrial application; seismic data acquisition, by testing the design - through SPICE simulation – on real seismic data obtained from seismic surveys for oil and gas exploration.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"485 1","pages":"1053-1057"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88199236","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-08-09DOI: 10.1109/MWSCAS47672.2021.9531795
Taif Alobaidi, W. Mikhael
In the last several years, we published several papers to address the problem of Face Identification. The techniques employed in those articles were implemented in transform domains. The Discrete Cosine (DCT) and the Discrete Wavelet (DWT) Transforms were utilized, either combined or individually, to extract features which form the final model for each participant in a given dataset. In this paper, we highlight significant parts of our previous works in order to give a fair comparison among all approaches. The results included here are for the following datasets: ORL, YALE, FERET, FEI, Georgia Tech, and Cropped AR. Features are DWT, DCT, energy-based selected DCT-DWT, and combined DCT-DWT coefficients while the classifier is Euclidean distance, either squared or with power of one.
{"title":"Review Paper on Transform Domains Techniques for Face Recognition","authors":"Taif Alobaidi, W. Mikhael","doi":"10.1109/MWSCAS47672.2021.9531795","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531795","url":null,"abstract":"In the last several years, we published several papers to address the problem of Face Identification. The techniques employed in those articles were implemented in transform domains. The Discrete Cosine (DCT) and the Discrete Wavelet (DWT) Transforms were utilized, either combined or individually, to extract features which form the final model for each participant in a given dataset. In this paper, we highlight significant parts of our previous works in order to give a fair comparison among all approaches. The results included here are for the following datasets: ORL, YALE, FERET, FEI, Georgia Tech, and Cropped AR. Features are DWT, DCT, energy-based selected DCT-DWT, and combined DCT-DWT coefficients while the classifier is Euclidean distance, either squared or with power of one.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"23 1","pages":"246-249"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86966070","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-08-09DOI: 10.1109/MWSCAS47672.2021.9531696
Benqing Guo, Jing Gong
A dual-band low-noise switched-gm active mixer is proposed with a current-source switch stage. Large sinusoidal LO signal driving is used to avoid the traditional RF port noise transferring by LO harmonics. An LC resonance tank structure is exploited to mitigate the high-frequency limitation by the tail parasitic capacitances charging and discharging behavior. Implemented in a 65 nm CMOS process, the proposed mixer prototype operates at an RF dual-band of 2.4/5.2 GHz and provides a maximal conversion gain of 11.2/11.6 dB and IIP3 of 6.7/5.5 dBm. For 5.2 GHz LO, the dual side-band noise figure (NF) of 4.3/3.3 dB is measured at fIF=10/200 MHz, respectively. The mixer core only consumes 8.4 mW from a 1.2 V supply voltage.
{"title":"A Dual-Band Low-Noise CMOS Switched-Transconductance Mixer with Current-Source Switch Driven by Sinusoidal LO Signals","authors":"Benqing Guo, Jing Gong","doi":"10.1109/MWSCAS47672.2021.9531696","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531696","url":null,"abstract":"A dual-band low-noise switched-gm active mixer is proposed with a current-source switch stage. Large sinusoidal LO signal driving is used to avoid the traditional RF port noise transferring by LO harmonics. An LC resonance tank structure is exploited to mitigate the high-frequency limitation by the tail parasitic capacitances charging and discharging behavior. Implemented in a 65 nm CMOS process, the proposed mixer prototype operates at an RF dual-band of 2.4/5.2 GHz and provides a maximal conversion gain of 11.2/11.6 dB and IIP3 of 6.7/5.5 dBm. For 5.2 GHz LO, the dual side-band noise figure (NF) of 4.3/3.3 dB is measured at fIF=10/200 MHz, respectively. The mixer core only consumes 8.4 mW from a 1.2 V supply voltage.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"1 1","pages":"741-744"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87076966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-08-09DOI: 10.1109/MWSCAS47672.2021.9531898
Israa Y. AbuShawish, S. Mahmoud
This work presents a tunable bandwidth bio-medical amplifier controlled by controlling the gain bandwidth of highly linear rail-to-rail operational amplifier. The proposed bio-medical amplifier capable to accommodate frequencies starts from 50 Hz up to 10 kHz to detect multiple bio-potential signals: EEG, ECG, EMG, PCG and Aps, using fixed and small load capacitance. The proposed bio-medical amplifier simply consists of two stages bio-amplifier each designed with constant Tera ohm MOS pseudo-resistors used as feedback resistors which also provides controllability to the lower cutoff frequency of the overall two stages bio-medical amplifier thus allowing the detection of the small frequency range. Simulations in LT-spice using the 90 nm CMOS model, BSIM4 level = 54 version 4.3 under +1 V supply voltage are performed to validate the performance of the proposed amplifier. High stability is maintained (phase margin ≥ 60°) over the whole frequency ranges and the overall power consumption of the bio-medical amplifier is not exceeding the 3.28 μW. The used op-amp facilitates reaching both rails of the supply voltage.
{"title":"Programable Bandwidth Bio-medical Amplifier for Multiple Bio-potential Signals Detection Systems","authors":"Israa Y. AbuShawish, S. Mahmoud","doi":"10.1109/MWSCAS47672.2021.9531898","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531898","url":null,"abstract":"This work presents a tunable bandwidth bio-medical amplifier controlled by controlling the gain bandwidth of highly linear rail-to-rail operational amplifier. The proposed bio-medical amplifier capable to accommodate frequencies starts from 50 Hz up to 10 kHz to detect multiple bio-potential signals: EEG, ECG, EMG, PCG and Aps, using fixed and small load capacitance. The proposed bio-medical amplifier simply consists of two stages bio-amplifier each designed with constant Tera ohm MOS pseudo-resistors used as feedback resistors which also provides controllability to the lower cutoff frequency of the overall two stages bio-medical amplifier thus allowing the detection of the small frequency range. Simulations in LT-spice using the 90 nm CMOS model, BSIM4 level = 54 version 4.3 under +1 V supply voltage are performed to validate the performance of the proposed amplifier. High stability is maintained (phase margin ≥ 60°) over the whole frequency ranges and the overall power consumption of the bio-medical amplifier is not exceeding the 3.28 μW. The used op-amp facilitates reaching both rails of the supply voltage.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"17 1","pages":"762-765"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85440599","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-08-09DOI: 10.1109/MWSCAS47672.2021.9531747
A. Oukaira, Touati Djallel eddine, Ahmad Hassan, Mohamed Ali, Y. Savaria, A. Lakhssassi
This paper evaluates the thermal and thermo-mechanical behavior of a packaged sensor interface embedding several high and low-voltage integrated circuits (ICs). The main objective of this study is to apply a numerical procedure to evaluate the fatigue strength of the layers and materials that, in general, represent one of the weakest parts of integrated electronic devices. Simulations performed with COMSOL Multiphysics® under stable boundary conditions at 25 °C up to 70 °C and transient conditions allow to estimate and plot the thermal map of the embedded ICs. Thermal stresses and their transient distributions are obtained. In addition, the deformations are evaluated to predict the number of cycles until failure of the constituent layers.
{"title":"Thermo-mechanical Analysis and Fatigue Life Prediction for Integrated Circuits (ICs)","authors":"A. Oukaira, Touati Djallel eddine, Ahmad Hassan, Mohamed Ali, Y. Savaria, A. Lakhssassi","doi":"10.1109/MWSCAS47672.2021.9531747","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531747","url":null,"abstract":"This paper evaluates the thermal and thermo-mechanical behavior of a packaged sensor interface embedding several high and low-voltage integrated circuits (ICs). The main objective of this study is to apply a numerical procedure to evaluate the fatigue strength of the layers and materials that, in general, represent one of the weakest parts of integrated electronic devices. Simulations performed with COMSOL Multiphysics® under stable boundary conditions at 25 °C up to 70 °C and transient conditions allow to estimate and plot the thermal map of the embedded ICs. Thermal stresses and their transient distributions are obtained. In addition, the deformations are evaluated to predict the number of cycles until failure of the constituent layers.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"43 1","pages":"630-634"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85572981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-08-09DOI: 10.1109/MWSCAS47672.2021.9531806
Dennis Michaelis, K. Ochs, S. Jenderny
Circuit implementations of neuronal networks should also consider dynamic axon models, since this introduces an additional dynamic aspect due to the transmission delays depending on the axon length. In this work, we derive an electrical circuit for self-organized axon growth based on which we design a neuronal network for learning and classifying gait patterns. We do so by utilizing a wave digital model of the axon model with growth concept, from which we can deduce the corresponding electrical circuit. Here, the axon growth is based on Jaumann structures with memristors. Emulation results show that after the successful training of the network, it can indeed recognize the correct gait patterns. In contrast to typical neuronal networks, this training is not based on synaptic weight changes but on the self-organized axon growth and hence delay-selection. Due to the additional degree of freedom, this can allow for a richer dynamic behavior of modeled neuronal networks.
{"title":"A Memristive Circuit for Gait Pattern Classification Based on Self-Organized Axon Growth","authors":"Dennis Michaelis, K. Ochs, S. Jenderny","doi":"10.1109/MWSCAS47672.2021.9531806","DOIUrl":"https://doi.org/10.1109/MWSCAS47672.2021.9531806","url":null,"abstract":"Circuit implementations of neuronal networks should also consider dynamic axon models, since this introduces an additional dynamic aspect due to the transmission delays depending on the axon length. In this work, we derive an electrical circuit for self-organized axon growth based on which we design a neuronal network for learning and classifying gait patterns. We do so by utilizing a wave digital model of the axon model with growth concept, from which we can deduce the corresponding electrical circuit. Here, the axon growth is based on Jaumann structures with memristors. Emulation results show that after the successful training of the network, it can indeed recognize the correct gait patterns. In contrast to typical neuronal networks, this training is not based on synaptic weight changes but on the self-organized axon growth and hence delay-selection. Due to the additional degree of freedom, this can allow for a richer dynamic behavior of modeled neuronal networks.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"95 1","pages":"162-165"},"PeriodicalIF":0.0,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86417566","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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