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2016 17th International Conference on Electronic Packaging Technology (ICEPT)最新文献

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Electromigration behavior of Sn3.0Ag0.5Cu/Sn58Bi structural composite solder interconnect Sn3.0Ag0.5Cu/Sn58Bi结构复合焊料互连的电迁移行为
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583134
Fengjiang Wang, Lili Zhou, Xiaojing Wang
The microstructure and electromigration of Bi and Sn in Cu/Sn58Bi/Cu and Cu/Sn58Bi /Sn3.0Ag0.5Cu/ Sn58Bi/Cu structural composite solder joint, were researched under the current density of 1.0×104 A/cm2 at room temperature. Two kinds of solder joints changed their morphology at both anode sides and cathode sides after current stressing. Bi layer was formed in the anode side while Sn layer was formed in the cathode side. The microanalysis indicated that Bi was the major diffusion element from cathode to anode and the migration of atomic Bi was faster than atomic Sn. Furthermore, through the comparison of two kinds of solder joints, it was easy to find that Sn3.0Ag0.5Cu suppressed the migration of atomic Bi and atomic Sn during electromigration.
研究了室温电流密度为1.0×104 A/cm2时Cu/Sn58Bi/Cu和Cu/Sn58Bi/ Sn3.0Ag0.5Cu/ Sn58Bi/Cu结构复合焊点中Bi和Sn的显微组织和电迁移规律。两种焊点在电流应力作用下,阳极侧和阴极侧的形貌都发生了变化。阳极侧形成Bi层,阴极侧形成Sn层。微量分析表明,铋是阴极向阳极扩散的主要元素,铋原子的迁移速度快于锡原子。此外,通过对两种焊点的比较,不难发现Sn3.0Ag0.5Cu在电迁移过程中抑制了原子Bi和原子Sn的迁移。
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引用次数: 0
Electrical simulation and fabrication of high Q spiral inductors on glass substrate using the glass reflow process 利用玻璃回流工艺在玻璃基板上制备高Q值螺旋电感器的电学模拟与研究
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583275
Hai-yang Chen, X. Jing, J. Shang
In order to meet the need of high integration and low cost of wireless communication systems, passive devices are widely used in all kinds of systems. This paper introduces an innovative method to manufacture integrated passive inductors based on glass reflow process. IPDs(integrated passive devices) have been simulated by 3D EM(electromagnetic) simulator software HFSS(high frequency structure simulator). From 0GHz to 10GHz, the Q value is above 200, higher than the Q value of conventional thin film inductors. Moreover, several key parameters of spiral inductors including inductor diameter, inductor thickness, substrate thickness, inductor width and inductor space are investigated. Finally, manufacturing process of inductors is presented.
为了满足无线通信系统的高集成度和低成本的要求,无源器件被广泛应用于各种系统中。介绍了一种基于玻璃回流工艺制造集成无源电感器的创新方法。采用三维电磁仿真软件HFSS(高频结构模拟器)对集成无源器件进行了仿真。从0GHz到10GHz, Q值在200以上,高于传统薄膜电感的Q值。此外,对螺旋电感的几个关键参数,包括电感直径、电感厚度、衬底厚度、电感宽度和电感空间进行了研究。最后介绍了电感器的制造工艺。
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引用次数: 2
Fast MSL analysis of microelectronic packages by using equal weight increasing method 用等增重法快速分析微电子封装的MSL
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583161
Zhixue Liu, Xiaosong Ma, Qiulin Ding, G. Zhang
With the wide application of microelectronics packaging products in the industry, the chip have been more and more attention in the harsh environment of high temperature, high humidity. Therefore how to rapidly deliver high reliability products to market has been one of the issues of concern in the microelectronics industry. However moisture sensitivity level (MSL) analysis in microelectronics packaging is one of the most time consuming problem. Thus it is important to study the mechanism and method of the analysis of moisture sensitivity and shorten the analysis time. In this paper the fast analysis of microelectronic package MS L is achieved by the approach of an equal weight of water increasing at different conditions by simulation. According to project requirements, the ESOP8 is chosen as experimental device. Further the model is established, which is used to calculate equal moisture weight increase, and 10 to 67 acceleration factors are obtained. The purpose of this paper is to realize MSL the fast reliability evaluation method for microelectronics packaging industry. Finally using ANS YS finite element simulation is for the calculation.
随着微电子封装产品在行业中的广泛应用,芯片在高温、高湿等恶劣环境下受到越来越多的关注。因此,如何将高可靠性产品快速推向市场已成为微电子工业关注的问题之一。然而,微电子封装中水分敏感等级(MSL)的分析是最耗时的问题之一。因此,研究水分敏感性分析的机理和方法,缩短分析时间具有重要意义。本文通过模拟,采用等重量水在不同条件下增加的方法,实现了微电子封装msl的快速分析。根据项目要求,选择ESOP8作为实验设备。在此基础上建立了计算等湿重增量的模型,得到了10 ~ 67个加速度因子。本文的目的是实现微电子封装行业快速可靠性评估方法MSL。最后利用ANS - YS有限元模拟进行了计算。
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引用次数: 1
Advanced packaging lithography and inspection solutions for next generation FOWLP-FOPLP processing 先进的封装光刻和检测解决方案,用于下一代FOWLP-FOPLP加工
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583315
K. Best, Gurvinder Singh, R. McCleary
For more than 50 years the semiconductor industry has pursued Moore's law, continuously improving device performance, reducing cost, and scaling transistor geometries down to where advanced CMOS has reached beyond the 10nm technology node. The commensurate increase in I/O count has created many challenges for device packaging which hitherto was considered low cost with simple solutions. It was once thought that old backend foundry lithography steppers could be used to address the new packaging requirements; which was true whilst the substrates remained in the traditional 300mm Silicon format. The recent unprecedented rapid growth in Fan Out Wafer Level Packaging (FOWLP) applications has introduced a more complicated landscape of process challenges, with no restriction on substrate format, where cost is the main driver and high yields are mandatory. This paper discusses the lithography process challenges that have ensued from disruptive FOWLP, and more recently the paradigm shift to Fan Out Panel Level Packaging (FOPLP). The work reports on lithography solutions for CD control over topography and high aspect ratio imaging of 2μm line/space RDL. In addition, the introduction of new inspection capabilities for defects and metrology is reported for both wafers and panels. The increase in lithography productivity and cost reduction provided by FOPLP is also discussed with production examples.
50多年来,半导体行业一直在追求摩尔定律,不断提高器件性能,降低成本,并将晶体管的几何形状缩小到先进的CMOS已经达到超过10nm的技术节点。I/O数量的相应增加给设备封装带来了许多挑战,迄今为止,设备封装被认为是低成本的、简单的解决方案。人们曾经认为,旧的后端铸造光刻步进机可以用来解决新的封装要求;这是真的,而衬底仍然是传统的300mm硅格式。最近扇形圆片级封装(FOWLP)应用的空前快速增长带来了更复杂的工艺挑战,对基板格式没有限制,其中成本是主要驱动因素,高产量是强制性的。本文讨论了光刻工艺的挑战,随之而来的破坏性FOWLP,以及最近的范式转移到扇出面板级封装(FOPLP)。本文报道了用于地形CD控制和2μm线/空间RDL高纵横比成像的光刻解决方案。此外,晶圆和面板的缺陷和计量新检测能力的引入也被报道。并结合生产实例讨论了FOPLP提高光刻生产率和降低成本的方法。
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引用次数: 5
Preparation of highly conductive adhesives by insitu incorporation of silver nanoparticles 银纳米颗粒原位掺入制备高导电性胶粘剂
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583170
Yankang Han, Baotan Zhang, Pengli Zhu, Qianqian Liu, Yougen Hu, R. Sun, C. Wong
In this paper, Ag nano-particles (Ag-NPs) with size of 50 nm, good stability and dispersion have been prepared via the tradition polyol method. Then, a small amount of this prepared nanosized Ag particles combined with the common used Ag micro-flake (Ag-MFs) were used as the conductive fillers to fabricate the isotropic electrically conductive adhesive (ICA). The content of the Ag-NPs on the electrical properties of the ICAs have been studied systematically. It is showed that, only a small amount of Ag-NPs, much lower than literature reported previously, can dramatically improve the electrical conductivity of the ICA based on Ag-MFs. The results indicated that for the 80wt% Ag-MFs filled ICA, after introducing 0.24wt% Ag-NPs, the volume resistivity of the samples could be reduced from 1.14 ×10-3 Ω·cm to 1.37×10-4 Ω·cm. ICA made by above method with the 70wt % Ag fillers have excellent overall performance with higher shear strength of 26.35 Mpa and a lower volume resistivity of 8.00×10-4 Ω·cm, which was considered to be an ideal ICA candidate for electronic packaging applications.
本文采用传统的多元醇法制备了尺寸为50 nm、稳定性好、分散性好的银纳米颗粒(Ag- nps)。然后,将少量制备的纳米银颗粒与常用的银微片(Ag- mfs)结合作为导电填料制备各向同性导电胶(ICA)。本文系统地研究了Ag-NPs含量对ICAs电学性能的影响。结果表明,少量的Ag-NPs(远低于文献报道)就能显著提高Ag-MFs基ICA的导电性。结果表明,对于填充率为80wt% Ag-MFs的ICA,引入0.24wt% Ag-NPs后,样品的体积电阻率可由1.14 ×10-3 Ω·cm降至1.37×10-4 Ω·cm。以70wt % Ag为填料制备的ICA具有优异的综合性能,抗剪强度为26.35 Mpa,体积电阻率为8.00×10-4 Ω·cm,是电子封装领域理想的ICA材料。
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引用次数: 3
Failure analysis of die-bonding interfaces between LED chip and heat sink LED芯片与散热器之间的模键接口失效分析
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583390
Wei Liu, Shunong Zhang, Yushen Jin, T. Zhang, L. C. Guo
The die bonding technology played a key role during the heat dissipating process in the high power LED packaging. At present, many manufacturers were confused about which kind of bonding technology they should choose. In this study, the high power LED devices from Cree and Lumileds were employed to study their die-bonding technologies. For the tested Cree's products, the initial interface had few voids before aged, however, under the action of injection current, the voids would initiated and propagated along the bonding boundary between LED chip and heats sink. For the tested Rebel LEDs, the crack and delamination of bonding pads were observed at the LED chip side.
在大功率LED封装散热过程中,晶片键合技术起着关键作用。目前,很多厂家对于应该选择哪种粘接技术感到困惑。在本研究中,采用Cree和Lumileds的大功率LED器件来研究它们的模合技术。对于被测的Cree产品,老化前的初始界面几乎没有空洞,但在注入电流的作用下,空洞会沿着LED芯片与散热器之间的键合边界产生并传播。对于测试的Rebel LED,在LED芯片侧观察到键合垫的裂纹和分层。
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引用次数: 1
Thermal and flow characteristics of device integrated metallic foam heat sinks with central impingement flow 具有中心冲击流的集成金属泡沫散热器的热特性和流动特性
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583179
H. Zhang, C. Li, P. Fan
In this work, thermal and flow characteristics for the metallic foam heat sinks (FHSs) with the central impingement flow were studied with de-ionized water coolant. Such a flow configuration helps to reduce the pressure drop inherent for straight flow in porous foams. The reduction in the pressure drop is analyzed based on the one-dimensional porous medium model and verified with experimental measurement. The FHSs was fabricated and their thermal and flow characteristics were experimentally tested by integrating with a thermal test chip in BGA package format. The test chip has been built in with thermal diodes and resistors as heating source and junction temperature measurement. The foam materials were made of copper with the porosity ranging 60%-90% at the same pore density of 60 PPI (pores per inch), which were first brazed to the copper cavity and then assembled with a cover plate to form the flow channels. The cover plate was fabricated with an inlet slot at the center and two outlets at the two ends to provide a uniform impingement flow on the top of the foam. The idea is to split the fluid flow at the center of the heating component so that the pressure drop through the bulk foam material is reduced. As a result, the pressure drop is found to drop significantly without sacrificing the thermal performance for the present FHSs.
本文采用去离子水冷却剂,研究了具有中心冲击流的金属泡沫散热器的热特性和流动特性。这种流动结构有助于减少多孔泡沫中直流固有的压降。基于一维多孔介质模型分析了压降的减小,并通过实验测量进行了验证。通过与BGA封装的热测试芯片集成,对fhs的热特性和流动特性进行了实验测试。该测试芯片内置了热二极管和电阻作为热源和结温测量。泡沫材料由孔隙率为60%-90%的铜制成,孔隙密度为60 PPI(气孔/英寸),首先将其钎焊到铜腔中,然后与盖板组装形成流道。所述盖板在中心有一个进气口,两端有两个出气口,在泡沫体顶部形成均匀的冲击流。这个想法是在加热部件的中心分离流体流动,这样通过散装泡沫材料的压力降就会减少。结果发现,在不牺牲热性能的情况下,目前的fhs压降显著下降。
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引用次数: 2
The microanalysis of copper-coated diamond composite powders prepared by electroless plating 化学镀镀铜包覆金刚石复合粉末的显微分析
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583389
Lianmeng Zhang, Shuya Xiong, Ruxia Liu, Jian Zhang, G. Luo, Q. Shen
Diamond-Cu matrix composite with high thermal conductivity and low coefficient of thermal expansion has been the high-performance thermal management materials. High-performance copper-coated diamond composite powders were successfully prepared using electroless plating at an appropriate bath temperature, pH value, copper ions concentration. The XRD results showed the coated Cu was highly pure with very little oxygen content. The SEM results that the particle size and surface roughness increased, with the increase of bath temperature, pH value, copper ions concentration separately. Finally, diamond-Cu composite powers with dense Cu coating and homogeneous Cu particles could be obtained under the optimum process conditions at the reaction temperature of 45 °C, pH value of 12.5 and copper ions concentration of 0.10 mol/L.
金刚石- cu基复合材料具有高导热系数和低热膨胀系数,是一种高性能的热管理材料。在适当的镀液温度、pH值、铜离子浓度条件下,采用化学镀法制备了高性能铜包覆金刚石复合粉体。XRD结果表明,包覆的Cu纯度高,氧含量极低。SEM结果表明,随着镀液温度、pH值、铜离子浓度的升高,颗粒尺寸增大,表面粗糙度增大。在反应温度为45℃、pH值为12.5、铜离子浓度为0.10 mol/L的最佳工艺条件下,可制得Cu包覆致密、Cu颗粒均匀的金刚石-Cu复合粉体。
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引用次数: 1
Development of a stable non-cyanide gold-tin electroplating solution for optoelectronic applications 光电用稳定无氰金-锡电镀溶液的研制
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583191
F. Huang, Yawei Liu, Mingliang L. Huang
A highly stable non-cyanide electroplating bath which can maintain clear at least one month was developed based on Au(III)-Sn(II) using 5,5-dimetheyl-hydantoin (DMH) and pyrophosphate as complexes. The combination of DMH and pyrophosphate can effectively minimize the difference of the deposition potentials between Au and Sn, making the codeposition of Au-Sn alloys possible. The cyclic voltammetry (CV) curve revealed that the codeposition of Au and Sn occurred at the potential of -790mV with a peak potential of -900mV. Pulsed plating was employed to optimize the morphology and composition of Au-Sn alloy films. The effects of pulse frequency, duty percentage and peak current density on the morphology and composition of the deposits were investigated. The compact Au-Sn eutectic alloy with Sn content controlled from 10 at.% to 50 at.% can be obtained. The Au-Sn deposits were characterized by the scanning electron microscopic (SEM) and energy-dispersive spectroscopic (EDS) analyses.
以金(III)-锡(II)为基料,以5,5-二甲基氢脲(DMH)和焦磷酸盐为配合物,研制了一种高稳定的无氰电镀液,可保持清洁至少一个月。DMH和焦磷酸盐的结合可以有效地减小Au和Sn的沉积电位差异,使Au-Sn合金的共沉积成为可能。循环伏安(CV)曲线显示,Au和Sn的共沉积发生在-790mV电位下,峰值电位为-900mV。采用脉冲镀的方法优化了金-锡合金薄膜的形貌和组成。研究了脉冲频率、占空比和峰值电流密度对镀层形貌和成分的影响。致密的金-锡共晶合金,锡含量控制在10at以内。%到50%。%可以得到。利用扫描电镜(SEM)和能谱分析(EDS)对金矿床进行了表征。
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引用次数: 1
Low melting alloy composites as thermal interface materials with low thermal resistance 低熔点合金复合材料作为低热阻的热界面材料
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583147
Haoran Wen, Yaqiang Ji, Kai Zhang, M. Yuen, S. Lee, Xianzhu Fu, R. Sun, C. Wong
Low melting alloy is mixed with Cu filler as thermal interface materials. The thermal performance is investigated by inserting the composite between Al blocks. The ratio of Cu filler is optimized to be 50% to achieve the lowest thermal resistance.
将低熔点合金与Cu填料混合作为热界面材料。通过在铝块之间插入复合材料来研究其热性能。为了达到最低的热阻,铜填料的配比优化为50%。
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引用次数: 0
期刊
2016 17th International Conference on Electronic Packaging Technology (ICEPT)
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