Pub Date : 2022-05-01DOI: 10.1109/ectc51906.2022.00086
Xinyue Wang, Z. Zeng, Jing Zhang, Guoqi Zhang, Pan Liu
With the increasing application of wide bandgap materials such as silicon carbide and gallium nitride in power devices, the working temperature of power devices has been pushed further. Therefore, it brings higher requirements for packaging materials. Sintered silver is a widely accepted chip connection material. However, silver suffers from high prices and electromigration. Therefore, a novel sintered material based on silver-copper core-shell structured particles raises the attention of researchers to solve this deficiency. To accelerate the development of new materials and their related processes, a four-sphere model of the silver-coated copper structure is established in this paper. The mathematical relationship between the porosity and thermal conductivity of sintered body and the actual sintering process was preliminarily established through the calculation based on a series of FEM simulations. The model was further validated through experiments. The modeling method and conclusion are utilized for future process adjustment, which is of great significance to accelerate the development, application, and reliability of new packaging materials.
{"title":"Simulation and Verification or Cu@Ag Core-shell Sintered Paste for Power Semiconductor Die-attach Applications","authors":"Xinyue Wang, Z. Zeng, Jing Zhang, Guoqi Zhang, Pan Liu","doi":"10.1109/ectc51906.2022.00086","DOIUrl":"https://doi.org/10.1109/ectc51906.2022.00086","url":null,"abstract":"With the increasing application of wide bandgap materials such as silicon carbide and gallium nitride in power devices, the working temperature of power devices has been pushed further. Therefore, it brings higher requirements for packaging materials. Sintered silver is a widely accepted chip connection material. However, silver suffers from high prices and electromigration. Therefore, a novel sintered material based on silver-copper core-shell structured particles raises the attention of researchers to solve this deficiency. To accelerate the development of new materials and their related processes, a four-sphere model of the silver-coated copper structure is established in this paper. The mathematical relationship between the porosity and thermal conductivity of sintered body and the actual sintering process was preliminarily established through the calculation based on a series of FEM simulations. The model was further validated through experiments. The modeling method and conclusion are utilized for future process adjustment, which is of great significance to accelerate the development, application, and reliability of new packaging materials.","PeriodicalId":139520,"journal":{"name":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133448529","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-01DOI: 10.1109/ectc51906.2022.00060
Liangxing Hu, Y. Lim, P. Zhao, Michael Joo Zhong Lim, Chuan Seng Tan
In this study, two-step argon/nitrogen plasma-activated aluminum surface for aluminum-aluminum direct bonding is reported. Surfaces from the as-deposited and the argon/nitrogen plasma-activated aluminum are characterized for hydrophilicity and surface chemical states. The results demonstrate that the plasma-activated aluminum surface has smaller water contact angle at 8° (i.e. more hydrophilic) and a thin layer of aluminum nitride. Moreover, the bonded plasma-activated dies, annealed at 300°C under 2000 mBar, have an impressive mechanical bonding strength of ~32 MPa with superior bonding quality. This plasma-activated bonding process is fast (10 s), requires low bonding force (50 N) and can be carried out in cleanroom environment, indicating its full promise for high-throughput heterogeneous integration and advanced packaging.
{"title":"Two-Step Ar/N2 Plasma-Activated Al Surface for Al-Al Direct Bonding","authors":"Liangxing Hu, Y. Lim, P. Zhao, Michael Joo Zhong Lim, Chuan Seng Tan","doi":"10.1109/ectc51906.2022.00060","DOIUrl":"https://doi.org/10.1109/ectc51906.2022.00060","url":null,"abstract":"In this study, two-step argon/nitrogen plasma-activated aluminum surface for aluminum-aluminum direct bonding is reported. Surfaces from the as-deposited and the argon/nitrogen plasma-activated aluminum are characterized for hydrophilicity and surface chemical states. The results demonstrate that the plasma-activated aluminum surface has smaller water contact angle at 8° (i.e. more hydrophilic) and a thin layer of aluminum nitride. Moreover, the bonded plasma-activated dies, annealed at 300°C under 2000 mBar, have an impressive mechanical bonding strength of ~32 MPa with superior bonding quality. This plasma-activated bonding process is fast (10 s), requires low bonding force (50 N) and can be carried out in cleanroom environment, indicating its full promise for high-throughput heterogeneous integration and advanced packaging.","PeriodicalId":139520,"journal":{"name":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132161069","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-01DOI: 10.1109/ectc51906.2022.00247
Woosol Lee, Josh Lane, M. Febo, Y. Yoon
This work presents a thin printed circuit board (PCB) based flexible metamaterial (MTM) lens that can operate for both 1.5 T (63.8 MHz) and 3 T (127.7 MHz) magnetic resonance imaging (MRI) systems. The flexible MTM lens is embedded between a scanning object and receiver coil to focus the magnetic field toward the receiver coil, thereby enhancing the signal-to-noise (SNR) ratio greatly. A flexible MTM lens is designed, fabricated, and characterized. The measurement results show that the demonstrated MTM lens is highly effective for magnifying the magnetic fields generated by the Tx coil, thereby increasing the RF power captured by the Rx coil for both frequency bands which leads to the SNR improvement in 1.5 T and 3 T MRI.
这项工作提出了一种基于薄印刷电路板(PCB)的柔性超材料(MTM)透镜，可以在1.5 T (63.8 MHz)和3 T (127.7 MHz)磁共振成像(MRI)系统中工作。柔性MTM透镜嵌入扫描物体和接收线圈之间，使磁场向接收线圈方向聚焦，从而大大提高了信噪比。设计、制造了一种柔性MTM透镜，并对其进行了表征。测量结果表明，MTM透镜能够有效放大Tx线圈产生的磁场，从而增加了Rx线圈在两个频段捕获的射频功率，从而提高了1.5 T和3 T MRI的信噪比。
{"title":"Flexible metamaterial lens for magnetic field and signal-to-noise ratio improvements in 1.5 T and 3 T magnetic resonance imaging","authors":"Woosol Lee, Josh Lane, M. Febo, Y. Yoon","doi":"10.1109/ectc51906.2022.00247","DOIUrl":"https://doi.org/10.1109/ectc51906.2022.00247","url":null,"abstract":"This work presents a thin printed circuit board (PCB) based flexible metamaterial (MTM) lens that can operate for both 1.5 T (63.8 MHz) and 3 T (127.7 MHz) magnetic resonance imaging (MRI) systems. The flexible MTM lens is embedded between a scanning object and receiver coil to focus the magnetic field toward the receiver coil, thereby enhancing the signal-to-noise (SNR) ratio greatly. A flexible MTM lens is designed, fabricated, and characterized. The measurement results show that the demonstrated MTM lens is highly effective for magnifying the magnetic fields generated by the Tx coil, thereby increasing the RF power captured by the Rx coil for both frequency bands which leads to the SNR improvement in 1.5 T and 3 T MRI.","PeriodicalId":139520,"journal":{"name":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","volume":"133 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127433359","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-01DOI: 10.1109/ectc51906.2022.00310
Guilian Gao, L. Mirkarimi, G. Fountain, D. Suwito, J. Theil, Thomas Workman, C. Uzoh, Bongsub Lee, K.M. Bang, Gabe Guevara
The Direct Bond Interconnect (DBI®) Ultra technology, a die-to-wafer (D2W) and die-to-die (D2D) hybrid bonding, is a platform technology that offers a hermetically sealed solid Cu-Cu interconnect through room temperature bonding and low temperature anneal. DBI wafer to wafer (W2W) bonding has been in high volume production since 2015. Advancement in D2W hybrid bonding technology in recent years has enabled recent adoption the technology by Sony [1]. AMD [2] and Intel [3]. The DBI Ultra D2W technology offers die-on-tape processing with bonding speeds comparable to mass reflow flip chip assembly. The bonding takes place at room temperature in an ambient environment in a class 1000 cleanroom. A low temperature batch anneal following bonding creates a solid Cu-Cu connection with no solder and no underfill.The value of the DBI Ultra technology can be realized in diverse products ranging from very small die to reticle-size large die. Applications such as RF, sensors and microcontrollers are in the small die domain, while GPUs and FPGAs require bonding of very large die. Ultimate SoC disaggregation implementations may include D2W bonding of mid-large sized memory die (e.g. SRAM in V-Cache) as well as ultra-small die for analog functionalities. In this paper, we present the results of D2W bonding development in die size ranging from 0.4x0.4mm to 3.2x3.0mm. The module build process includes dicing, die preparation on tape, and direct pick & place from a tape frame. The bonding quality is characterized with C-mode scanning acoustic microscopy (CSAM) and cross-section microscopy analysis.
{"title":"Die to Wafer Hybrid Bonding for Chiplet and Heterogeneous Integration: Die Size Effects Evaluation-Small Die Applications","authors":"Guilian Gao, L. Mirkarimi, G. Fountain, D. Suwito, J. Theil, Thomas Workman, C. Uzoh, Bongsub Lee, K.M. Bang, Gabe Guevara","doi":"10.1109/ectc51906.2022.00310","DOIUrl":"https://doi.org/10.1109/ectc51906.2022.00310","url":null,"abstract":"The Direct Bond Interconnect (DBI®) Ultra technology, a die-to-wafer (D2W) and die-to-die (D2D) hybrid bonding, is a platform technology that offers a hermetically sealed solid Cu-Cu interconnect through room temperature bonding and low temperature anneal. DBI wafer to wafer (W2W) bonding has been in high volume production since 2015. Advancement in D2W hybrid bonding technology in recent years has enabled recent adoption the technology by Sony [1]. AMD [2] and Intel [3]. The DBI Ultra D2W technology offers die-on-tape processing with bonding speeds comparable to mass reflow flip chip assembly. The bonding takes place at room temperature in an ambient environment in a class 1000 cleanroom. A low temperature batch anneal following bonding creates a solid Cu-Cu connection with no solder and no underfill.The value of the DBI Ultra technology can be realized in diverse products ranging from very small die to reticle-size large die. Applications such as RF, sensors and microcontrollers are in the small die domain, while GPUs and FPGAs require bonding of very large die. Ultimate SoC disaggregation implementations may include D2W bonding of mid-large sized memory die (e.g. SRAM in V-Cache) as well as ultra-small die for analog functionalities. In this paper, we present the results of D2W bonding development in die size ranging from 0.4x0.4mm to 3.2x3.0mm. The module build process includes dicing, die preparation on tape, and direct pick & place from a tape frame. The bonding quality is characterized with C-mode scanning acoustic microscopy (CSAM) and cross-section microscopy analysis.","PeriodicalId":139520,"journal":{"name":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","volume":"117 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115454196","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-01DOI: 10.1109/ectc51906.2022.00022
S. Mei, Lim Teck Guan, Chai Tai Chong
This paper presents a 4×8 AiP array implemented in Fan-Out Wafer-Level-Packaging (FOWLP) technology for 77GHz high resolution compact multi-functional MIMO radar applications. It features a cavity-backed 3D stacked structure to achieve stable patterns and wide bandwidth. The fabricated sample with a size of 16mm×16mm×0.402mm shows a measured |S11| <-12.2dB, Gain >14dBi and stable patterns with boresight radiations over 77-81GHz.
{"title":"77GHz Cavity-Backed AiP Array in FOWLP Technology","authors":"S. Mei, Lim Teck Guan, Chai Tai Chong","doi":"10.1109/ectc51906.2022.00022","DOIUrl":"https://doi.org/10.1109/ectc51906.2022.00022","url":null,"abstract":"This paper presents a 4×8 AiP array implemented in Fan-Out Wafer-Level-Packaging (FOWLP) technology for 77GHz high resolution compact multi-functional MIMO radar applications. It features a cavity-backed 3D stacked structure to achieve stable patterns and wide bandwidth. The fabricated sample with a size of 16mm×16mm×0.402mm shows a measured |S11| <-12.2dB, Gain >14dBi and stable patterns with boresight radiations over 77-81GHz.","PeriodicalId":139520,"journal":{"name":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","volume":"55 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124181742","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-01DOI: 10.1109/ectc51906.2022.00221
S. W. Ho, Hsiao Hsiang-Yao, Lau Boon Long, Sharon Lim Pei Siang, Lim Teck Guan, C. T. Chong
A Fan-out wafer level package (FO-WLP), Antenna in Package (AiP) test vehicle built for 77 GHz automotive radar was demonstrated in this paper. The AiP test vehicle is made up of three layers of Cu redistribution lines in a two-tier mold construction. The antenna arrays are manufactured on the top tier mold compound layer, while the MMIC device chips are implanted in the bottom tier mold compound layer. This two-tier mold structure was created to reduce the form factor of the AiP. A series of material evaluation was performed to select suitable material candidates for the FO-WLP AiP test vehicle fabrication. Mold compound and photo-dielectric were evaluated for their process-ability, reliability and electrical performance. Temporary bonding adhesive and carrier types were also evaluated for their bonding/de-bonding performance and warpage. AiP test vehicles were fabricated with the selected materials using the "mold-first" process flow and reliability test was performed on the fabricated samples.
{"title":"Development of Two-Tier FO-WLP AiPs for Automotive Radar Application","authors":"S. W. Ho, Hsiao Hsiang-Yao, Lau Boon Long, Sharon Lim Pei Siang, Lim Teck Guan, C. T. Chong","doi":"10.1109/ectc51906.2022.00221","DOIUrl":"https://doi.org/10.1109/ectc51906.2022.00221","url":null,"abstract":"A Fan-out wafer level package (FO-WLP), Antenna in Package (AiP) test vehicle built for 77 GHz automotive radar was demonstrated in this paper. The AiP test vehicle is made up of three layers of Cu redistribution lines in a two-tier mold construction. The antenna arrays are manufactured on the top tier mold compound layer, while the MMIC device chips are implanted in the bottom tier mold compound layer. This two-tier mold structure was created to reduce the form factor of the AiP. A series of material evaluation was performed to select suitable material candidates for the FO-WLP AiP test vehicle fabrication. Mold compound and photo-dielectric were evaluated for their process-ability, reliability and electrical performance. Temporary bonding adhesive and carrier types were also evaluated for their bonding/de-bonding performance and warpage. AiP test vehicles were fabricated with the selected materials using the \"mold-first\" process flow and reliability test was performed on the fabricated samples.","PeriodicalId":139520,"journal":{"name":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114467834","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-01DOI: 10.1109/ectc51906.2022.00318
Jiaxiong Li, John Wilson, D. Cheung, Zhijian Sun, K. Moon, Madhavan Swaminathan, C. Wong
Delamination and cracking of the many epoxy-copper interfaces under stress is one major failure mechanism in power packaging. It has therefore become a critical issue in the upcoming wide-bandgap semiconductor era that is expecting increased power density and device miniaturization. The higher operation temperature and voltage, as well as the harsh operation environments considering humidity factors, have posed great challenges on the robustness of these joints. Under moisture attack, the covalent bond or hydrogen bond formation based mechanism, which can be assisted by coupling agents, are intrinsically susceptible to hydrolysis degradation. Coordination bonds between copper and ligands with O or N doners, on the other hand, are a notably more stable mechanism. Furthermore, the costly and limited-access substrate pre-treatments are deemed less favorable in the fast-paced assembly process. The introduction of coordination compounds in epoxy resin that can function at interfaces without being consumed by the polymer backbone remains an obstacle. To address these issues, in this work an in-formulation metal complex-based modifier for epoxy resin is reported to enhance the adhesion performance of epoxy to copper under temperature-humidity aging. The curing, thermomechanical and chemical assessments are used to provide mechanistic insights into the adhesion and moisture resistance improvement.
{"title":"Epoxy Resin with Metal Complex Additives for Improved Reliability of Epoxy-Copper Joint","authors":"Jiaxiong Li, John Wilson, D. Cheung, Zhijian Sun, K. Moon, Madhavan Swaminathan, C. Wong","doi":"10.1109/ectc51906.2022.00318","DOIUrl":"https://doi.org/10.1109/ectc51906.2022.00318","url":null,"abstract":"Delamination and cracking of the many epoxy-copper interfaces under stress is one major failure mechanism in power packaging. It has therefore become a critical issue in the upcoming wide-bandgap semiconductor era that is expecting increased power density and device miniaturization. The higher operation temperature and voltage, as well as the harsh operation environments considering humidity factors, have posed great challenges on the robustness of these joints. Under moisture attack, the covalent bond or hydrogen bond formation based mechanism, which can be assisted by coupling agents, are intrinsically susceptible to hydrolysis degradation. Coordination bonds between copper and ligands with O or N doners, on the other hand, are a notably more stable mechanism. Furthermore, the costly and limited-access substrate pre-treatments are deemed less favorable in the fast-paced assembly process. The introduction of coordination compounds in epoxy resin that can function at interfaces without being consumed by the polymer backbone remains an obstacle. To address these issues, in this work an in-formulation metal complex-based modifier for epoxy resin is reported to enhance the adhesion performance of epoxy to copper under temperature-humidity aging. The curing, thermomechanical and chemical assessments are used to provide mechanistic insights into the adhesion and moisture resistance improvement.","PeriodicalId":139520,"journal":{"name":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117064317","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-01DOI: 10.1109/ectc51906.2022.00096
Heeseok Lee, Kyoung-Min Lee, Daehan Youn, Kyojin Hwang, Junghwa Kim
Hybrid configuration including face-up and face-down with redistribution layer (RDL) based fan-out package (FoPKG) is presented to stack multiple dies with satisfying small form-factor requirement. In this work, authors will address that hybrid stacked die package (HSDP) solution with through silicon via (TSV) for 3D-IC as well as TSV-less configuration will be a promising solution to achieve extremely small form-factor package.
{"title":"Hybrid Stacked-Die Package Solution for Extremely Small-Form-Factor Package","authors":"Heeseok Lee, Kyoung-Min Lee, Daehan Youn, Kyojin Hwang, Junghwa Kim","doi":"10.1109/ectc51906.2022.00096","DOIUrl":"https://doi.org/10.1109/ectc51906.2022.00096","url":null,"abstract":"Hybrid configuration including face-up and face-down with redistribution layer (RDL) based fan-out package (FoPKG) is presented to stack multiple dies with satisfying small form-factor requirement. In this work, authors will address that hybrid stacked die package (HSDP) solution with through silicon via (TSV) for 3D-IC as well as TSV-less configuration will be a promising solution to achieve extremely small form-factor package.","PeriodicalId":139520,"journal":{"name":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129871760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-01DOI: 10.1109/ectc51906.2022.00142
M. Nishida, H. Noma, Tetsuro Iwakura, Masaki Yamaguchi, Kazuyuki Mitsukura
Fine line and space of 10 micrometer widths were demonstrated on a smooth surface prepreg by semi-additive process (SAP) assisted by ultraviolet (UV) irradiation. The flipchip ball grid array (FC-BGA) packages were fabricated using substrates made of prepreg with glass cloth or insulation film without glass cloth. The warpage of the package at 260 degree Celsius using prepreg was 45% of that using insulation film. The reason would be the high rigidity of prepreg. Highly Accelerated Stress Test (HAST) reliability of the comb copper pattern for the 10 micrometer line and space was also confirmed for 200 h. The SAP technology assisted by UV irradiation would be a solution not only for high-frequency application due to the smooth surface but for warpage reduction of FC-BGA package and for fine-pitch solder joint of flip-chip chip scale package (FC-CSP).
{"title":"Fine Copper Lines with High Adhesion on High Rigidity Dielectrics","authors":"M. Nishida, H. Noma, Tetsuro Iwakura, Masaki Yamaguchi, Kazuyuki Mitsukura","doi":"10.1109/ectc51906.2022.00142","DOIUrl":"https://doi.org/10.1109/ectc51906.2022.00142","url":null,"abstract":"Fine line and space of 10 micrometer widths were demonstrated on a smooth surface prepreg by semi-additive process (SAP) assisted by ultraviolet (UV) irradiation. The flipchip ball grid array (FC-BGA) packages were fabricated using substrates made of prepreg with glass cloth or insulation film without glass cloth. The warpage of the package at 260 degree Celsius using prepreg was 45% of that using insulation film. The reason would be the high rigidity of prepreg. Highly Accelerated Stress Test (HAST) reliability of the comb copper pattern for the 10 micrometer line and space was also confirmed for 200 h. The SAP technology assisted by UV irradiation would be a solution not only for high-frequency application due to the smooth surface but for warpage reduction of FC-BGA package and for fine-pitch solder joint of flip-chip chip scale package (FC-CSP).","PeriodicalId":139520,"journal":{"name":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128540247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-01DOI: 10.1109/ectc51906.2022.00023
Charles A. Lynch, Ajibayo O. Adeyeye, M. Tentzeris
With the increasing demand for scalable and high performing wireless devices for Digital Twinning applications in industrial systems and in the Metaverse, there is likewise increasing demand to explore means of "Smart" packaging enabled devices. In this effort, the authors report a minimalistic, ultra-lowcost mmID module operating in the 60 GHz with a resistive-based temperature sensor for localized sensing applications. The presented system is capable of simultaneously sensing the local temperature of the self-identifying mmID while maintaining a ranging accuracy of 5.35 mm. In addition, simultaneous multi-tag interrogation capability is demonstrated through the "Smart" packaging of the mmID enabled through Frequency Division Multiplexing. Thus, the system features a framework for future Digital Twinning and Metaverse applications that utilize multiple self-identifying mmID's for localized sensing.
{"title":"\"Smart\" Packaging of Self-Identifying and Localizable mmID for Digital Twinning and Metaverse Temperature Sensing Applications","authors":"Charles A. Lynch, Ajibayo O. Adeyeye, M. Tentzeris","doi":"10.1109/ectc51906.2022.00023","DOIUrl":"https://doi.org/10.1109/ectc51906.2022.00023","url":null,"abstract":"With the increasing demand for scalable and high performing wireless devices for Digital Twinning applications in industrial systems and in the Metaverse, there is likewise increasing demand to explore means of \"Smart\" packaging enabled devices. In this effort, the authors report a minimalistic, ultra-lowcost mmID module operating in the 60 GHz with a resistive-based temperature sensor for localized sensing applications. The presented system is capable of simultaneously sensing the local temperature of the self-identifying mmID while maintaining a ranging accuracy of 5.35 mm. In addition, simultaneous multi-tag interrogation capability is demonstrated through the \"Smart\" packaging of the mmID enabled through Frequency Division Multiplexing. Thus, the system features a framework for future Digital Twinning and Metaverse applications that utilize multiple self-identifying mmID's for localized sensing.","PeriodicalId":139520,"journal":{"name":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129363568","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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