Pub Date : 2021-10-31DOI: 10.31399/asm.cp.istfa2021p0241
Yunfei Wang, H. Ryu, T. Tong
In this paper, we present case studies of localizing resistive open defects using various FA techniques, including two-terminal IV, two-terminal Electron-Beam Absorbed Current (EBAC), Electron Beam Induced Resistance Change (EBIRCh), Pulsed IV, Capacitance-Voltage (CV) and Scanning Capacitance Microscopy (SCM). The advantage and limitation of each technique will also be discussed.
{"title":"Resistive Open Defect Isolation in Nano-Probing","authors":"Yunfei Wang, H. Ryu, T. Tong","doi":"10.31399/asm.cp.istfa2021p0241","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2021p0241","url":null,"abstract":"\u0000 In this paper, we present case studies of localizing resistive open defects using various FA techniques, including two-terminal IV, two-terminal Electron-Beam Absorbed Current (EBAC), Electron Beam Induced Resistance Change (EBIRCh), Pulsed IV, Capacitance-Voltage (CV) and Scanning Capacitance Microscopy (SCM). The advantage and limitation of each technique will also be discussed.","PeriodicalId":188323,"journal":{"name":"ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134326799","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.31399/asm.cp.istfa2021p0029
Zhifeng Zhu, Paul Leone
This article describes a method to integrate Analog Signature Analysis (ASA) into IR based Direct Current Inject method (IRDCI) for Printed Circuit Board Assembly failure analysis, which extends IRDCI application from diagnostic shorted power rails to any measurement locations that show signature differences. Also, it extends the application of component failure modes from electrical short to breakdown or degradation that can be identified by signature comparison and still keep high efficiency to eliminate the needs to guess and remove suspected faulty components one by one from the board to validate.
{"title":"Locate faulty components by IR based Direct Current Injection method with Analog Signature Analysis","authors":"Zhifeng Zhu, Paul Leone","doi":"10.31399/asm.cp.istfa2021p0029","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2021p0029","url":null,"abstract":"\u0000 This article describes a method to integrate Analog Signature Analysis (ASA) into IR based Direct Current Inject method (IRDCI) for Printed Circuit Board Assembly failure analysis, which extends IRDCI application from diagnostic shorted power rails to any measurement locations that show signature differences. Also, it extends the application of component failure modes from electrical short to breakdown or degradation that can be identified by signature comparison and still keep high efficiency to eliminate the needs to guess and remove suspected faulty components one by one from the board to validate.","PeriodicalId":188323,"journal":{"name":"ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122237871","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.31399/asm.cp.istfa2021p0044
D. Braun, S. Diez, J. Kopitzke
Considering the growing need for the use of semiconductors in the automotive industry, this paper aims to describe the analyzing process from an automotive manufacturer point of view. The use of X-Ray Microscopy and a combination of ToF-SIMS and FIB are shown.
{"title":"Semiconductor Failure Analysis in Automotive Industry at BMW: from X-Ray Microscopy to ToF-SIMS Measurements on a STEM Lamella","authors":"D. Braun, S. Diez, J. Kopitzke","doi":"10.31399/asm.cp.istfa2021p0044","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2021p0044","url":null,"abstract":"\u0000 Considering the growing need for the use of semiconductors in the automotive industry, this paper aims to describe the analyzing process from an automotive manufacturer point of view. The use of X-Ray Microscopy and a combination of ToF-SIMS and FIB are shown.","PeriodicalId":188323,"journal":{"name":"ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115497763","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.31399/asm.cp.istfa2021p0006
M. Kögel, S. Brand, C. Große, F. Altmann, K. Jacobs, I. De Wolf
Lock-In Thermography is an established non-destructively operating method for the analysis of failures in microelectronic devices. In recent years a major improvement was achieved allowing the acquisition of the time-resolved temperature responses of weak thermal spots that enhances defect localization in 3D stacked semiconductor architectures. The assessment of a defect's depth based on the numerical estimation of the delay between excitation and thermal response by analyzing the value of the lock-in phase is often prone to thermal noise and parasitic effects. In sample structures that contain partial or full transparence for the infrared signal between the origin and the sample surface, the interference of the direct (radiated) and the conducted signal component largely falsifies the phase value on which the classical depth estimation relies. In the present study blind source separation based on independent component analysis of the thermal signals was successfully applied to separate interfering signal components arising from direct thermal radiation and conduction for a precise estimation of the defect depth.
{"title":"Analysis of time-resolved thermal responses in Lock-In thermography by independent component analysis (ICA) for a 3D-spatial separation of weak thermal sources and defects","authors":"M. Kögel, S. Brand, C. Große, F. Altmann, K. Jacobs, I. De Wolf","doi":"10.31399/asm.cp.istfa2021p0006","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2021p0006","url":null,"abstract":"\u0000 Lock-In Thermography is an established non-destructively operating method for the analysis of failures in microelectronic devices. In recent years a major improvement was achieved allowing the acquisition of the time-resolved temperature responses of weak thermal spots that enhances defect localization in 3D stacked semiconductor architectures. The assessment of a defect's depth based on the numerical estimation of the delay between excitation and thermal response by analyzing the value of the lock-in phase is often prone to thermal noise and parasitic effects. In sample structures that contain partial or full transparence for the infrared signal between the origin and the sample surface, the interference of the direct (radiated) and the conducted signal component largely falsifies the phase value on which the classical depth estimation relies. In the present study blind source separation based on independent component analysis of the thermal signals was successfully applied to separate interfering signal components arising from direct thermal radiation and conduction for a precise estimation of the defect depth.","PeriodicalId":188323,"journal":{"name":"ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130682038","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.31399/asm.cp.istfa2021p0020
Jisuk Kim, Earl Kim, Daehyeon Lee, Taeheon Lee, Daesik Ham, Miju Yang, Wanha Hwang, Jaeyoung Kim, Sangyong Yoon, Youngwook Jeong, Eun-Kyoung Kim, Ki-Whan Song, J. Song, Myungsuk Kim, W. Choi
In the NAND flash manufacturing process, thousands of internal electronic fuses (eFuse) should be tuned in order to optimize performance and validity. In this paper, we propose a machine learning-based optimization technique that can automatically tune the individual eFuse value based on a deep learning and genetic algorithm. Using state-of-the-art triple-level cell (TLC) V-NAND flash wafers, we trained our model and validated its effectiveness. The experimental results show that our technique can automatically optimize NAND flash memory, thus reducing total turnaround time (TAT) by 70 % compared with the manual-based process.
{"title":"Machine Learning-Based Optimization Technique for High-Capacity V-NAND Flash Memory","authors":"Jisuk Kim, Earl Kim, Daehyeon Lee, Taeheon Lee, Daesik Ham, Miju Yang, Wanha Hwang, Jaeyoung Kim, Sangyong Yoon, Youngwook Jeong, Eun-Kyoung Kim, Ki-Whan Song, J. Song, Myungsuk Kim, W. Choi","doi":"10.31399/asm.cp.istfa2021p0020","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2021p0020","url":null,"abstract":"\u0000 In the NAND flash manufacturing process, thousands of internal electronic fuses (eFuse) should be tuned in order to optimize performance and validity. In this paper, we propose a machine learning-based optimization technique that can automatically tune the individual eFuse value based on a deep learning and genetic algorithm. Using state-of-the-art triple-level cell (TLC) V-NAND flash wafers, we trained our model and validated its effectiveness. The experimental results show that our technique can automatically optimize NAND flash memory, thus reducing total turnaround time (TAT) by 70 % compared with the manual-based process.","PeriodicalId":188323,"journal":{"name":"ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123586835","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.31399/asm.cp.istfa2021p0347
Jisun Ryu, Seojin Kim, C. H. Kang, Jaeheum Baek
The plan-view TEM analysis has been used for 3D NAND flash memory to analyze metrology and chemical of channel holes. Focused Ion Beam (FIB) is one of the most powerful techniques for precise location sampling in nanometer-scale for Transmission Electron Microscope (TEM) sample preparation. As semiconductor technology improves continuously, 3D NAND is requiring higher stacks to increasing the capacity of storage. In general, an operator counts the cell layer manually to reach the desire layer on TEM sample before thinning. It is not easy way to make TEM samples at the exact desired layer. To make it easier, automatic cell layer counting workflow is introduced in this paper. This progress is carried out until the desired target cell is reached. Furthermore, marking is performed on the target cell layer. This automation recipe is able to offer simple process to count the desired cell layer without manual action and make TEM sample preparation easily.
{"title":"Automated Cell Layer Counting and Marking at Target Layer of 3D NAND TEM Samples by Focused Ion Beam","authors":"Jisun Ryu, Seojin Kim, C. H. Kang, Jaeheum Baek","doi":"10.31399/asm.cp.istfa2021p0347","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2021p0347","url":null,"abstract":"\u0000 The plan-view TEM analysis has been used for 3D NAND flash memory to analyze metrology and chemical of channel holes. Focused Ion Beam (FIB) is one of the most powerful techniques for precise location sampling in nanometer-scale for Transmission Electron Microscope (TEM) sample preparation. As semiconductor technology improves continuously, 3D NAND is requiring higher stacks to increasing the capacity of storage. In general, an operator counts the cell layer manually to reach the desire layer on TEM sample before thinning. It is not easy way to make TEM samples at the exact desired layer. To make it easier, automatic cell layer counting workflow is introduced in this paper. This progress is carried out until the desired target cell is reached. Furthermore, marking is performed on the target cell layer. This automation recipe is able to offer simple process to count the desired cell layer without manual action and make TEM sample preparation easily.","PeriodicalId":188323,"journal":{"name":"ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114668237","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.31399/asm.cp.istfa2021p0126
Hyun Woo Shim, Taehun Lee, J. Kwon
This study demonstrates that a high-volume TEM workflow can be achieved for inline defect characterization by adding a defect marking step using commercially available tools. A simple user-assisted defect marking step added to a conventional automated ex-situ lift-out TEM workflow showed 2.9 times faster throughput using 11 times less man-hours, a significant productivity gain over a conventional manual TEM workflow.
{"title":"Automated TEM Workflow for Inline Defect Characterization","authors":"Hyun Woo Shim, Taehun Lee, J. Kwon","doi":"10.31399/asm.cp.istfa2021p0126","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2021p0126","url":null,"abstract":"\u0000 This study demonstrates that a high-volume TEM workflow can be achieved for inline defect characterization by adding a defect marking step using commercially available tools. A simple user-assisted defect marking step added to a conventional automated ex-situ lift-out TEM workflow showed 2.9 times faster throughput using 11 times less man-hours, a significant productivity gain over a conventional manual TEM workflow.","PeriodicalId":188323,"journal":{"name":"ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis","volume":"232 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122100137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.31399/asm.cp.istfa2021p0309
Chun Haur Khoo, Z. J. Lau
With the increase in the complexity of semiconductor wafer fabrication processes, the timing in responding and discovering the failure mechanism to a product failure at the initial product development stage or at the end of production line becomes a crucial factor. Effectively utilization the fault localization technique such as Photon Emission Microscopy (PEM), Laser Signal Injection Microscopy (LSIM) and Thermal Hotspot Localization (THS) may be significantly shortened the cycle time in the fault localization process. This paper will illustrate the creative approaches for thermal hot spot identification using modulated THS technique coupled with modified external electrical connection.
{"title":"Creative Approaches for Thermal Hot Spot Identification on Analog IC","authors":"Chun Haur Khoo, Z. J. Lau","doi":"10.31399/asm.cp.istfa2021p0309","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2021p0309","url":null,"abstract":"\u0000 With the increase in the complexity of semiconductor wafer fabrication processes, the timing in responding and discovering the failure mechanism to a product failure at the initial product development stage or at the end of production line becomes a crucial factor. Effectively utilization the fault localization technique such as Photon Emission Microscopy (PEM), Laser Signal Injection Microscopy (LSIM) and Thermal Hotspot Localization (THS) may be significantly shortened the cycle time in the fault localization process. This paper will illustrate the creative approaches for thermal hot spot identification using modulated THS technique coupled with modified external electrical connection.","PeriodicalId":188323,"journal":{"name":"ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116894234","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.31399/asm.cp.istfa2021p0410
P. Nowakowski, C. Bonifacio, M. Ray, P. Fischione
This paper presents a development in semiconductor device delayering by broad ion beam milling that offers a uniform delayering area on a millimeter scale. A milling area of this size is made possible by the user's ability to position ion beams individually to cover the desired area. This flexibility in ion beam positioning also enables more precise targeting of an area of interest.
{"title":"Large Area Semiconductor Device Delayering for Failure Identification and Analyses","authors":"P. Nowakowski, C. Bonifacio, M. Ray, P. Fischione","doi":"10.31399/asm.cp.istfa2021p0410","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2021p0410","url":null,"abstract":"\u0000 This paper presents a development in semiconductor device delayering by broad ion beam milling that offers a uniform delayering area on a millimeter scale. A milling area of this size is made possible by the user's ability to position ion beams individually to cover the desired area. This flexibility in ion beam positioning also enables more precise targeting of an area of interest.","PeriodicalId":188323,"journal":{"name":"ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122990402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-10-31DOI: 10.31399/asm.cp.istfa2021p0283
R. Blando, L. Hladík, J. Oboňa, Tomáš Borůvka, M. Búran, M. Krause, B. Rottwinkel, S. Fuller
In this work we present a large-volume workflow for fast failure analysis of microelectronic devices that combines a stand-alone ps-laser ablation tool with a SEM/Xe Plasma FIB system. In this synergy, the ps-laser is used to quickly remove large volumes of bulk material while the SEM/Xe Plasma FIB is used for precise end-pointing to the feature of interest and fine surface polishing after laser. The concept of having a stand-alone laser tool obeys the logic of maximizing productivity as both systems can work simultaneously and continuously. As application examples we first present a full workflow to prepare an artefact-free, delamination-free cross-section in an AMOLED mobile display. We also present applications examples that require cm-sized long cuts to cut through whole microelectronic devices, or removal of cubic-mm of material to prepare mm-sized cross-sections in packages. We discuss a way how to implement correlation data across the laser and FIBSEM platforms through SYNOPSYS Avalon SW allowing precise navigation to the area of interest using layout circuit overlays. We also show an example of image bitmap overlay to navigate across platforms and end-pointing.
{"title":"Pairing Laser Ablation and Xe Plasma FIB-SEM: An Approach for Precise End-Pointing in Large-Scale Physical Failure Analysis in the Semiconductor Industry","authors":"R. Blando, L. Hladík, J. Oboňa, Tomáš Borůvka, M. Búran, M. Krause, B. Rottwinkel, S. Fuller","doi":"10.31399/asm.cp.istfa2021p0283","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2021p0283","url":null,"abstract":"\u0000 In this work we present a large-volume workflow for fast failure analysis of microelectronic devices that combines a stand-alone ps-laser ablation tool with a SEM/Xe Plasma FIB system. In this synergy, the ps-laser is used to quickly remove large volumes of bulk material while the SEM/Xe Plasma FIB is used for precise end-pointing to the feature of interest and fine surface polishing after laser. The concept of having a stand-alone laser tool obeys the logic of maximizing productivity as both systems can work simultaneously and continuously. As application examples we first present a full workflow to prepare an artefact-free, delamination-free cross-section in an AMOLED mobile display. We also present applications examples that require cm-sized long cuts to cut through whole microelectronic devices, or removal of cubic-mm of material to prepare mm-sized cross-sections in packages. We discuss a way how to implement correlation data across the laser and FIBSEM platforms through SYNOPSYS Avalon SW allowing precise navigation to the area of interest using layout circuit overlays. We also show an example of image bitmap overlay to navigate across platforms and end-pointing.","PeriodicalId":188323,"journal":{"name":"ISTFA 2021: Conference Proceedings from the 47th International Symposium for Testing and Failure Analysis","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123316846","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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