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1992 International Technical Digest on Electron Devices Meeting最新文献

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Prospects of high voltage power ICs on thin SOI 薄SOI上高压功率集成电路的前景
Pub Date : 1900-01-01 DOI: 10.1109/IEDM.1992.307348
A. Nakagawa, N. Yasuhara, I. Omura, Y. Yamaguchi, T. Ogura, T. Matsudai
Silicon on Insulator technology is promising for high voltage power IC applications. The required SOI layer thickness can be reduced if a large portion of the applied voltage is sustained by the bottom insulator layer. Combination of SOI and trenches or LOCOS has merits of simplified device isolation and high device packing density. Thin SOI layer will realize high-speed switching in high voltage devices because of the smaller amount of stored carriers. Substrate bias influences on device characteristics and potentials of SOI technology are discussed.<>
绝缘体上硅技术在高压功率集成电路中应用前景广阔。如果施加电压的很大一部分由底部绝缘体层维持,则可以减少所需的SOI层厚度。SOI与沟槽或LOCOS的组合具有简化器件隔离和器件封装密度高的优点。薄SOI层由于载流子的存储量较少,将实现高压器件的高速开关。讨论了衬底偏压对器件特性和SOI技术电位的影响。
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引用次数: 39
A 32*32 two-dimensional photodetector array using a-Si pin photodiodes and poly-Si TFTs integrated on a transparent substrate 采用A - si引脚光电二极管和多晶硅tft集成在透明衬底上的32*32二维光电探测器阵列
Pub Date : 1900-01-01 DOI: 10.1109/IEDM.1992.307452
M. Okamura, K. Kimura, S. Shirai, N. Yamauchi
We have designed, fabricated, and characterized a 32*32 two-dimensional photodetector array using amorphous silicon (a-Si) pin photodiodes and polysilicon (poly-Si) TFTs integrated on a transparent substrate. This work demonstrates the feasibility of a light-transmitting two-dimensional photodetector array for use in parallel optoelectronic systems such as free-space photonic switching systems.<>
我们设计、制造并表征了一个32*32的二维光电探测器阵列,该阵列使用非晶硅(a- si)引脚光电二极管和集成在透明衬底上的多晶硅(poly-Si) tft。这项工作证明了用于平行光电系统(如自由空间光子开关系统)的透光二维光电探测器阵列的可行性。
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引用次数: 2
A 144 GHz InP/InGaAs composite collector heterostructure bipolar transistor 144ghz InP/InGaAs复合集电极异质结构双极晶体管
Pub Date : 1900-01-01 DOI: 10.1109/IEDM.1992.307312
A. Feygenson, R. Hamm, P. Smith, M. Pinto, R. Montgomery, R. D. Yadvish, H. Temkin
We describe a composite collector InP/InGaAs heterostructure bipolar transistor with f/sub T/=144 GHz and f/sub max/=81 GHz. The breakdown voltage BV/sub CEO/ is greater than 5V and output conductance is essentially independent of the collector voltage. This combination of performance characteristics is obtained with a carefully optimized collector structure. A monolithic transimpedance amplifier based on composite collector transistors has a bandwidth of 28 GHz and gain of 40 dB Omega . A hybrid optical receiver constructed with these amplifiers has open eye diagrams at 32 Gbit/s and a 1*10/sup -9/ error rate with -23.7 dBm of incident power.<>
描述了一种f/sub T/=144 GHz, f/sub max/=81 GHz的复合集电极InP/InGaAs异质结构双极晶体管。击穿电压BV/sub CEO/大于5V,输出电导基本上与集电极电压无关。这种性能特征的组合是通过精心优化的集热器结构获得的。基于复合集电极晶体管的单片跨阻放大器带宽为28 GHz,增益为40 dB ω。使用这些放大器构建的混合光接收器具有32 Gbit/s的开眼图和1*10/sup -9/错误率,入射功率为-23.7 dBm。
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引用次数: 16
New shunt wiring technologies for high performance HDTV CCD image sensors 高性能HDTV CCD图像传感器的新型分流布线技术
Pub Date : 1900-01-01 DOI: 10.1109/IEDM.1992.307319
K. Orihara, K. Minami, T. Nakano, K. Hatano, M. Furumiya, N. Mutoh, M. Ohbo, Y. Hokari
New shunt wiring technologies for HDTV FIT-CCD image sensors have been developed. They include tungsten direct shunt wiring structure. As well as a new layout for tungsten shunt lines and aluminum bus lines. A 1-inch format 2M pixel FIT-CCD image sensor was fabricated using these technologies. A low smear level, less than -110 dB, was achieved at 1 MHz frame shift frequency. Furthermore, a 1.2*10/sup 5/ electron charge handling capability was obtained up to 1.4 MHz frame shift frequency.<>
开发了用于高清电视FIT-CCD图像传感器的新型分流布线技术。它们包括钨直接并联布线结构。同时对钨制分流线和铝制母线进行了全新布局。利用这些技术制作了1英寸格式的2M像素FIT-CCD图像传感器。在1 MHz帧移频率下实现了低于-110 dB的低涂抹水平。此外,在1.4 MHz帧移频率下,获得了1.2*10/sup 5/电子电荷处理能力。
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引用次数: 1
A 27 GHz double polysilicon bipolar technology on bonded SOI with embedded 58 mu m/sup 2/ CMOS memory cells for ECL-CMOS SRAM applications 一种27 GHz双多晶硅双极技术,在键合SOI上嵌入58 μ m/sup / CMOS存储单元,用于ECL-CMOS SRAM应用
Pub Date : 1900-01-01 DOI: 10.1109/IEDM.1992.307304
T. Hiramoto, N. Tamba, M. Yoshida, T. Hashimoto, T. Fujiwara, K. Watanabe, M. Odaka, M. Usami, T. Ikeda
A double polysilicon bipolar technology with high-speed, high-packing density, low power consumption, and high alpha -particle immunity has been newly developed. Bonded SOI substrates are used to improve the alpha -particle immunity, and scaled CMOS memory cells are introduced to reduce the power consumption and to increase the packing density. The cut-off frequency of the bipolar transistors is as high as 27 GHz and the area of the CMOS memory cell is 58 mu m/sup 2/. This technology is promising for application to ultra high-speed, high-density LSIs with ECL-CMOS scheme.<>
提出了一种高速、高堆积密度、低功耗、高粒子抗扰度的双多晶硅双极技术。采用键合SOI衬底来提高α粒子抗扰度,并引入缩放CMOS存储单元来降低功耗和增加封装密度。双极晶体管的截止频率高达27 GHz, CMOS存储单元的面积为58 μ m/sup /。该技术有望应用于ECL-CMOS方案的超高速高密度lsi。
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引用次数: 20
Photon emission from 70 nm gate length MOSFETs 70 nm栅长mosfet的光子发射
Pub Date : 1900-01-01 DOI: 10.1109/IEDM.1992.307533
H. Kurino, H. Hashimoto, Y. Hiruma, T. Fujimori, M. Koyanagi
The photon emission from extremely small size MOSFETs with L/sub G/=70 nm is observed for the first time. It is found that the electron temperature of the hot electrons monotonously increases while the substrate current to drain current ratio which is related to the avalanche multiplication factor initially increases and then decreases due to the latch effect caused by the parasitic bipolar transistor action as the gate length is reduced from 500 nm to 70 nm. The number of photons emitted with a higher energy has more intimate relation with the charge pumping current change caused by the hot-carrier generated interface states. It is shown that the photon emission is more effective for evaluating the hot carrier phenomenon than the substrate current when the gate length is smaller and the drain voltage is higher.<>
首次观测到L/sub G/=70 nm的极小尺寸mosfet的光子发射。结果表明,当栅极长度从500 nm减小到70 nm时,热电子的电子温度单调升高,而与雪崩倍增因子有关的衬底电流与漏极电流比由于寄生双极晶体管的锁存效应先升高后降低。高能量发射的光子数与热载子产生的界面态引起的电荷抽运电流变化关系更为密切。结果表明,当栅极长度较小时,漏极电压较高时,光子发射比衬底电流更能有效地评价热载子现象。
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引用次数: 5
A novel electron emitter with AlGaAs planar doped barrier 一种具有AlGaAs平面掺杂势垒的新型电子发射器
Pub Date : 1900-01-01 DOI: 10.1109/IEDM.1992.307522
W. Jiang, U. Mishra
Hot electron emission from a planar surface has been pursued in the past two decades in both silicon and III-V compound semiconductors. Since they are majority carrier devices and have controllable material growth by MBE, emitters made from planar doped barrier (PDB) structures have the advantages of high current density and high electron emission efficiency. The authors present the emission from a new Al/sub 0.3/Ga/sub 0.7/As-GaAs PDB emitter. A PDB structure consists of a sequence of n/sup +/-i-p/sup +/(delta-doped)-i-n/sup +/ layers. The p/sup +/ delta-doped sheet is fully depleted giving rise to a triangular barrier. A positive bias applied to the surface forward biases the n/sup +/-i-p/sup +/ injecting junction and reverse biases the p/sup +/-i-n/sup +/ accelerating junction so that electrons in the n/sup +/ region are injected across the barrier into a high field region and accelerated toward the surface. Electrons with kinetic energy larger than the surface work function are then emitted. For an efficient PDB emitter, the transit distance (the total thickness of the accelerating region and the top contact layer) should be small and the accelerating voltage (the voltage drop across the accelerating region) should be large. The breakdown of the accelerating junction sets an upper limit to the field applied to the accelerating region. One way to increase the accelerating voltage and hence the electron kinetic energy, without sacrificing the small transit distance, is using materials with a higher breakdown field.<>
在过去的二十年里,人们一直在硅和III-V化合物半导体中研究平面表面的热电子发射。平面掺杂势垒(PDB)结构的发射体以载流子为主,具有可控的MBE材料生长特性,具有高电流密度和高电子发射效率的优点。本文介绍了一种新型Al/sub 0.3/Ga/sub 0.7/As-GaAs PDB发射极的发射特性。PDB结构由n/sup +/-i-p/sup +/(δ掺杂)-i-n/sup +/层序列组成。p/sup +/ δ掺杂片完全耗尽,形成三角形势垒。施加在表面的正偏压使n/sup +/-i-p/sup +/注入结正向偏压,使p/sup +/-i-n/sup +/加速结反向偏压,从而使n/sup +/区域中的电子穿过势垒注入到高场区域并加速到表面。然后发射出动能大于表面功函数的电子。对于一个高效的PDB发射极,传输距离(加速区和顶部接触层的总厚度)应该很小,加速电压(跨越加速区的电压降)应该很大。加速结的击穿设置了施加于加速区域的场的上限。在不牺牲小的传输距离的情况下,增加加速电压从而提高电子动能的一种方法是使用具有更高击穿场的材料。
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引用次数: 0
Robust, wide range hydrogen sensor 坚固,宽范围氢气传感器
Pub Date : 1900-01-01 DOI: 10.1109/IEDM.1992.307415
J. Rodriguez, R. C. Hughes, W. Corbett, P. McWhorter
A new robust, wide-range hydrogen sensor technology integrates catalytic gate transistors and resistors with a baseline CMOS process. Pd or PdNi gate transistors detect low concentrations of hydrogen (ppm) and Pd or PdNi thin film resistors sense higher concentrations of hydrogen (up to 100%). Fabrication of both sensors on the same die allows detection of hydrogen over a dynamic range of 6 orders of magnitude. On-chip power transistor heaters and diode thermometers allow accurate chip temperature control.<>
一种新的强大,宽范围的氢传感器技术将催化栅极晶体管和电阻与基准CMOS工艺集成在一起。Pd或PdNi栅极晶体管检测低浓度的氢(ppm)和Pd或PdNi薄膜电阻器检测高浓度的氢(高达100%)。在同一模具上制造这两个传感器允许在6个数量级的动态范围内检测氢。片上功率晶体管加热器和二极管温度计允许精确的芯片温度控制。
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引用次数: 14
Fabrication of TFTs using plasma CVD poly-Si at very low temperature 低温等离子体CVD多晶硅制备tft
Pub Date : 1900-01-01 DOI: 10.1109/IEDM.1992.307450
M. Mohri, H. Kakinuma, T. Tsuruoka
Polycrystalline-Si (poly-Si) films prepared by conventional plasma CVD with SiF/sub 4//SiH/sub 4//H/sub 2/ gases at a very low temperature (300 degrees C) have been applied to thin film transistors (TFTs). The thickness dependance of crystallinity and the surface morphology are characterized. Top gate coplanar TFT have been fabricated with optimized poly-Si. The characteristics are improved by annealing (400 degrees C). It increased the field effect mobility ( mu /sub e/) to 10.1 cm/sup 2//Vs and reduced off current (I/sub off/) by more than one order of magnitude.<>
用SiF/sub 4//SiH/sub 4//H/sub 2/气体在极低温度(300℃)下制备的多晶硅(poly-Si)薄膜已经应用于薄膜晶体管(TFTs)中。对结晶度和表面形貌的厚度依赖性进行了表征。采用优化后的多晶硅材料制备了顶栅共面TFT。退火(400℃)改善了特性,使场效应迁移率(mu /sub - e/)提高到10.1 cm/sup 2//Vs,并将关断电流(I/sub - off/)降低了一个数量级以上。
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引用次数: 3
Quality factor control for micromechanical resonators 微机械谐振器的质量因子控制
Pub Date : 1900-01-01 DOI: 10.1109/IEDM.1992.307411
C. Nguyen, Roger T. IAowe
The implementation of very high Q microelectromechanical filters, constructed of spring-coupled or parallel resonators, requires strict control over the quality factor of the constituent resonators. This report details electrostatic feedback techniques which allow precise control of the quality factor of a micromechanical resonator device, independent of the ambient operating pressure of the micromechanical system. Theoretical formulas governing Q-control are derived and experimentally verified.<>
实现由弹簧耦合或并联谐振器构成的非常高Q的微机电滤波器,需要严格控制各组成谐振器的质量因子。本报告详细介绍了静电反馈技术,该技术可以精确控制微机械谐振器设备的质量因子,而不受微机械系统的环境操作压力的影响。推导了控制q的理论公式,并进行了实验验证
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引用次数: 67
期刊
1992 International Technical Digest on Electron Devices Meeting
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