Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962728
Y. Araga, Ranto Miura, M. Nagata, C. Neve, J. de Vos, G. van der Plas, E. Beyne
A 3D-integrated test vehicle that emulates noise generation and propagation in a heterogeneous integrated system has been developed. In-stack waveform capturers are embedded on each tier which captured the generation and propagation of noise. A consistent analytical model is created and analysis using that model has allowed us to develop a design strategy for the power delivery network to attenuate noise propagation in the stacked system.
{"title":"A study on power integrity in a 3D chip stack using dynamic power supply current emulation and power noise monitoring","authors":"Y. Araga, Ranto Miura, M. Nagata, C. Neve, J. de Vos, G. van der Plas, E. Beyne","doi":"10.1109/ESTC.2014.6962728","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962728","url":null,"abstract":"A 3D-integrated test vehicle that emulates noise generation and propagation in a heterogeneous integrated system has been developed. In-stack waveform capturers are embedded on each tier which captured the generation and propagation of noise. A consistent analytical model is created and analysis using that model has allowed us to develop a design strategy for the power delivery network to attenuate noise propagation in the stacked system.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126996274","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962861
J. Strogies, K. Wilke
This article outlines the realization of a universal joining technology that provides high temperature compliant solder joints. Major achievement of provided solutions is to overcome the conflict of objectives concerning low thermal budget to joining partners during assembly processes and high melting points of the resultant joints during operation. One cost effective approach to solve this conflict is diffusion soldering. In contrast to thermal solidification this soldering variant uses concentration change of materials to achieve at least locally high-melting intermetallic phases. Comprehensive evaluations of potential material systems led to a simple binary system of Sn and Cu with eutectic composition at SnCu0.7 (melting temperature 227°C) and high melting-temperature phases Cu6Sn5 (Tm about 415°C) and Cu3Sn (Tm about 670°C). Diffusion soldering is used already in wafer to wafer and chip to lead frame soldering technologies. To achieve a universal joining technology with focus on wide range of chip to ceramic and second level assembly in the field of surface mount technology the challenge of short bridgeable distances has to be solved by technical creases. This article outlines technical solutions of dispersed Cu particles and special topographic elements that provide the potential to increase joining zones up to 100 μm. Process flows and equipment for major technological solutions are described. Potential adaption in mass production and results of technical reliability are shown. In addition comprehensive analysis results of metallographic investigations are shown to give an introduction to new challenges of diffusion soldered interconnects.
{"title":"Universal high-temperature suitable joint adapting diffusion soldering","authors":"J. Strogies, K. Wilke","doi":"10.1109/ESTC.2014.6962861","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962861","url":null,"abstract":"This article outlines the realization of a universal joining technology that provides high temperature compliant solder joints. Major achievement of provided solutions is to overcome the conflict of objectives concerning low thermal budget to joining partners during assembly processes and high melting points of the resultant joints during operation. One cost effective approach to solve this conflict is diffusion soldering. In contrast to thermal solidification this soldering variant uses concentration change of materials to achieve at least locally high-melting intermetallic phases. Comprehensive evaluations of potential material systems led to a simple binary system of Sn and Cu with eutectic composition at SnCu0.7 (melting temperature 227°C) and high melting-temperature phases Cu6Sn5 (Tm about 415°C) and Cu3Sn (Tm about 670°C). Diffusion soldering is used already in wafer to wafer and chip to lead frame soldering technologies. To achieve a universal joining technology with focus on wide range of chip to ceramic and second level assembly in the field of surface mount technology the challenge of short bridgeable distances has to be solved by technical creases. This article outlines technical solutions of dispersed Cu particles and special topographic elements that provide the potential to increase joining zones up to 100 μm. Process flows and equipment for major technological solutions are described. Potential adaption in mass production and results of technical reliability are shown. In addition comprehensive analysis results of metallographic investigations are shown to give an introduction to new challenges of diffusion soldered interconnects.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"125 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127932067","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962833
Z. Sárkány, A. Vass-Várnai, M. Rencz
Power cycling is a widely used accelerated lifetime testing method to evaluate the reliability of power modules and discrete components. Based on the accelerated test results one can deduce the lifetime of these devices in normal operation conditions. Although, we have to be careful, because not only the initial parameters, but the control strategy used during the cycling tests may also affect the measured lifetime. In this paper we present the results of a power cycling experiment, which was carried out using three different cycling strategies. Several electrical parameters were measured in each cycle and thermal transient results were captured at regular intervals to enable evaluating how the failures evolve in the different cycling strategies.
{"title":"Comparison of different power cycling strategies for accelerated lifetime testing of power devices","authors":"Z. Sárkány, A. Vass-Várnai, M. Rencz","doi":"10.1109/ESTC.2014.6962833","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962833","url":null,"abstract":"Power cycling is a widely used accelerated lifetime testing method to evaluate the reliability of power modules and discrete components. Based on the accelerated test results one can deduce the lifetime of these devices in normal operation conditions. Although, we have to be careful, because not only the initial parameters, but the control strategy used during the cycling tests may also affect the measured lifetime. In this paper we present the results of a power cycling experiment, which was carried out using three different cycling strategies. Several electrical parameters were measured in each cycle and thermal transient results were captured at regular intervals to enable evaluating how the failures evolve in the different cycling strategies.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"93 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132947052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962829
Åsmund Sandvand, E. Halvorsen, K. Aasmundtveit
A MEMS pressure-sensor, including its vacuum reference cavity, is modelled with focus on resulting stress from a glass frit bonding process. Based on CT-scans of bonded samples, a parametric model for FEM analysis of observed variations in bonding material distribution has been developed. Simulations show a high influence of amount and distribution of excess glass frit material on the zero-point as well as a good correlation with manufacturing data. Simulated variations of glass frit material distribution shows a variation of the zero-point of -1.5 % full scale (FS) to -7.2 %FS, depending on configuration.
{"title":"Finite element modelling of influence of bonding material distribution in precision piezoresistive MEMS pressure-sensors","authors":"Åsmund Sandvand, E. Halvorsen, K. Aasmundtveit","doi":"10.1109/ESTC.2014.6962829","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962829","url":null,"abstract":"A MEMS pressure-sensor, including its vacuum reference cavity, is modelled with focus on resulting stress from a glass frit bonding process. Based on CT-scans of bonded samples, a parametric model for FEM analysis of observed variations in bonding material distribution has been developed. Simulations show a high influence of amount and distribution of excess glass frit material on the zero-point as well as a good correlation with manufacturing data. Simulated variations of glass frit material distribution shows a variation of the zero-point of -1.5 % full scale (FS) to -7.2 %FS, depending on configuration.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"47 38","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134225587","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962832
Hao Zhang, S. Nagao, Sungwon Park, Shunsuke Koga, T. Sugahara, K. Suganuma
Low temperature and low pressure sintering Ag paste composed by sub-micro Ag particle and organic solvent was presented. The apparent improvement of bonding strength was realized by adding small amount of nano thickness Ag flake. Optimum proportion of sub-micro particle and nano thickness flake was determined. Nano-SiC particles were added into the optimized paste for sake of the possibility of properties advancement. The electrical property of newly developed Ag paste was measured by an improved test method. SiC die attachment and DBC (Direct Bonding Cu) substrate was conducted to test the practical application prospect of newly developed Nano-SiC added Ag paste.
{"title":"Nano-SiC added Ag paste sintering die-attach for SiC power devices","authors":"Hao Zhang, S. Nagao, Sungwon Park, Shunsuke Koga, T. Sugahara, K. Suganuma","doi":"10.1109/ESTC.2014.6962832","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962832","url":null,"abstract":"Low temperature and low pressure sintering Ag paste composed by sub-micro Ag particle and organic solvent was presented. The apparent improvement of bonding strength was realized by adding small amount of nano thickness Ag flake. Optimum proportion of sub-micro particle and nano thickness flake was determined. Nano-SiC particles were added into the optimized paste for sake of the possibility of properties advancement. The electrical property of newly developed Ag paste was measured by an improved test method. SiC die attachment and DBC (Direct Bonding Cu) substrate was conducted to test the practical application prospect of newly developed Nano-SiC added Ag paste.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115226664","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962754
K. Elian, H. Theuss
This paper introduces a novel assembly and manufacturing technology for integrating permanent magnets into magnet sensor modules by use of plastic bonded magnets. High precision speed sensors in automotive applications, e.g. in anti-blocking-system or engine management, are based on a magnetic measurement principle [1]. Typical sensor modules contain a semiconductor based sensor chip and a permanent magnet providing the necessary bias field (see Fig. 1). This field is modulated by a passing external gear wheel out of material with high magnetic permeability, which is part of the magnetic circuit. The wheel speed can directly be determined by measuring the frequency of the magnetic field modulation. Permanent magnets are often assembled in a sequential pick and place process. We report a novel assembly technology by direct molding of thermoplast bonded magnets onto a chip carrier containing pre-assembled sensors. We will show, that this offers the following advantages: - Highest accuracy - Optimum working point, in particular for GMR sensors - High throughput by efficient parallel process - Simplification of the module assembly.
{"title":"Integration of polymer bonded magnets into magnetic sensors","authors":"K. Elian, H. Theuss","doi":"10.1109/ESTC.2014.6962754","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962754","url":null,"abstract":"This paper introduces a novel assembly and manufacturing technology for integrating permanent magnets into magnet sensor modules by use of plastic bonded magnets. High precision speed sensors in automotive applications, e.g. in anti-blocking-system or engine management, are based on a magnetic measurement principle [1]. Typical sensor modules contain a semiconductor based sensor chip and a permanent magnet providing the necessary bias field (see Fig. 1). This field is modulated by a passing external gear wheel out of material with high magnetic permeability, which is part of the magnetic circuit. The wheel speed can directly be determined by measuring the frequency of the magnetic field modulation. Permanent magnets are often assembled in a sequential pick and place process. We report a novel assembly technology by direct molding of thermoplast bonded magnets onto a chip carrier containing pre-assembled sensors. We will show, that this offers the following advantages: - Highest accuracy - Optimum working point, in particular for GMR sensors - High throughput by efficient parallel process - Simplification of the module assembly.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"135 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122462572","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962773
A. Syed-Khaja, J. Franke
This paper gives an overview of the optimization of the present state-of-the-art soldering technologies for diffusion soldering in power electronics, in particular for Transient liquid phase soldering (TLPS) with enhancements in process conditions to reduce the void percentage in the interconnections and at the same time accelerate the rate of intermetallic phase (IMP) formation. Addressing the difficulties in realizing a void-free TLPS joint in large-area die-attach in power electronics, the variations in soldering process parameters like temperature, pressure and time are discussed. The complete transformation of thin Sn-Cu solder interlayers (15-20μm) into Cu6Sn5 and Cu3Sn IMPs and related void information for varying solder profile variants have been explained. To evaluate the potential for TLPS process, the advanced reflow soldering mechanisms like vacuum vapor-phase soldering and over-pressure convection soldering have been investigated. Depending on the void percentages and IMP formation rate, an optimized interconnection process has been introduced which is capable of realizing TLPS joints with convectional electronic production equipment.
{"title":"Investigations on advanced soldering mechanisms for transient liquid phase soldering (TLPS) in power electronics","authors":"A. Syed-Khaja, J. Franke","doi":"10.1109/ESTC.2014.6962773","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962773","url":null,"abstract":"This paper gives an overview of the optimization of the present state-of-the-art soldering technologies for diffusion soldering in power electronics, in particular for Transient liquid phase soldering (TLPS) with enhancements in process conditions to reduce the void percentage in the interconnections and at the same time accelerate the rate of intermetallic phase (IMP) formation. Addressing the difficulties in realizing a void-free TLPS joint in large-area die-attach in power electronics, the variations in soldering process parameters like temperature, pressure and time are discussed. The complete transformation of thin Sn-Cu solder interlayers (15-20μm) into Cu6Sn5 and Cu3Sn IMPs and related void information for varying solder profile variants have been explained. To evaluate the potential for TLPS process, the advanced reflow soldering mechanisms like vacuum vapor-phase soldering and over-pressure convection soldering have been investigated. Depending on the void percentages and IMP formation rate, an optimized interconnection process has been introduced which is capable of realizing TLPS joints with convectional electronic production equipment.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122579154","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962819
M. Saito, K. Matsunaga, J. Mizuno, H. Nishikawa
We investigated a low-temperature bond formation process, wherein nanoporous structures were formed on electrode surfaces by electrodeposition and dealloying. The morphology control of a nanoporous Au-Ag structure was investigated using electrochemical deposition and electrochemical methods. The ligament size of the electrodeposited Au-Ag films after dealloying increased upon annealing. The ligament size of 10-20 nm for as-deposited increased to 50-100 nm for films annealed at 150 °C. The samples that were annealed at 50 °C before dealloying indicated a finer nanoporous structure, which corresponded to the highest bond strength of the evaluated samples. The volume of selective dissolution was small on as-deposited samples despite the anodic current being the largest of the examined films. Inductively coupled plasma mass spectrometry (ICP-MS) analysis showed that the change of the Ag content of the films after dealloying of as-deposited samples was the smallest of the examined films. Small ligament size with a finer nanoporous structure resulted in high bond strength.
{"title":"Nano-porous structure control under electrodeposition and dealloying conditions for low-temperature bonding","authors":"M. Saito, K. Matsunaga, J. Mizuno, H. Nishikawa","doi":"10.1109/ESTC.2014.6962819","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962819","url":null,"abstract":"We investigated a low-temperature bond formation process, wherein nanoporous structures were formed on electrode surfaces by electrodeposition and dealloying. The morphology control of a nanoporous Au-Ag structure was investigated using electrochemical deposition and electrochemical methods. The ligament size of the electrodeposited Au-Ag films after dealloying increased upon annealing. The ligament size of 10-20 nm for as-deposited increased to 50-100 nm for films annealed at 150 °C. The samples that were annealed at 50 °C before dealloying indicated a finer nanoporous structure, which corresponded to the highest bond strength of the evaluated samples. The volume of selective dissolution was small on as-deposited samples despite the anodic current being the largest of the examined films. Inductively coupled plasma mass spectrometry (ICP-MS) analysis showed that the change of the Ag content of the films after dealloying of as-deposited samples was the smallest of the examined films. Small ligament size with a finer nanoporous structure resulted in high bond strength.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122740240","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962765
A. Dziedzic, A. Kłossowicz, P. Winiarski, A. Stadler, W. Stęplewski
This paper presents systematic studies of electrical, noise and long-term stability parameters of resistors (thin-film or polymer thick-film) and capacitors embedded in Printed Circuit Boards (PCBs). The temperature dependence of resistance or capacitance were determined in a wide temperature range (from -180°C to 130°C) and analyzed as a function of geometry of passives and cladding process. The in-situ accelerated ageing process (basic properties of passives measured directly at ageing conditions) was carried out to perform long-term behavior analysis. Low frequency noise measurements were made in room temperature using noise spectra measurements in dc bridge configuration. The R(T) characteristics are linear with almost constant, negative value of differential TCR (of about -60 ppm/K for 100 Ω/sq Ni-P resistors). Both groups of investigated resistors revealed similar range of relative resistance changes after ageing processes but the results showed the quite different behavior of both groups versus time. It means that the dynamics of ageing changes was different. Only positive resistance changes were observed for Ni-P resistors, whereas the shape of characteristics for polymer ones were much more complex, exhibited increase as well as decrease in resistance under environmental exposure. 1/f noise generated by resistance fluctuations was found as the main noise component but the significant difference of noise level was observed for both groups of investigated resistors. The C(T) characteristics are nonlinear with larger capacitance changes at higher temperature. Capacitors exposed to elevated temperature exhibited capacitance and dissipation factor decrease. The relative changes were from the range from -12% to -2% for capacitance and up to -60% for dissipation factor. The value of relative drift of parameters was dependent strongly on dielectric composition and size. Moreover the results revealed nonlinear characteristics in temperature domain as well.
{"title":"Chosen electrical, noise and stability characteristics of passive components embedded in printed circuit boards","authors":"A. Dziedzic, A. Kłossowicz, P. Winiarski, A. Stadler, W. Stęplewski","doi":"10.1109/ESTC.2014.6962765","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962765","url":null,"abstract":"This paper presents systematic studies of electrical, noise and long-term stability parameters of resistors (thin-film or polymer thick-film) and capacitors embedded in Printed Circuit Boards (PCBs). The temperature dependence of resistance or capacitance were determined in a wide temperature range (from -180°C to 130°C) and analyzed as a function of geometry of passives and cladding process. The in-situ accelerated ageing process (basic properties of passives measured directly at ageing conditions) was carried out to perform long-term behavior analysis. Low frequency noise measurements were made in room temperature using noise spectra measurements in dc bridge configuration. The R(T) characteristics are linear with almost constant, negative value of differential TCR (of about -60 ppm/K for 100 Ω/sq Ni-P resistors). Both groups of investigated resistors revealed similar range of relative resistance changes after ageing processes but the results showed the quite different behavior of both groups versus time. It means that the dynamics of ageing changes was different. Only positive resistance changes were observed for Ni-P resistors, whereas the shape of characteristics for polymer ones were much more complex, exhibited increase as well as decrease in resistance under environmental exposure. 1/f noise generated by resistance fluctuations was found as the main noise component but the significant difference of noise level was observed for both groups of investigated resistors. The C(T) characteristics are nonlinear with larger capacitance changes at higher temperature. Capacitors exposed to elevated temperature exhibited capacitance and dissipation factor decrease. The relative changes were from the range from -12% to -2% for capacitance and up to -60% for dissipation factor. The value of relative drift of parameters was dependent strongly on dielectric composition and size. Moreover the results revealed nonlinear characteristics in temperature domain as well.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"193 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122870535","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962850
M. Mostofizadeh, L. Frisk
Most of the commonly used lead-free solders have a high melting temperature. However, in many applications a lower processing temperature would be beneficial. Therefore a demand has arisen for reliable lead-free solder with a lower melting temperature. Among the low temperature lead-free solders, Sn-9Zn and Sn-8Zn-3Bi (wt.%) are suitable candidates for many applications, since they offer good mechanical reliability and melting temperature similar to that of Sn-Pb solders. However, because they contain an active element (Zn), they need to be used with caution, especially in corrosive environments and in high-temperature applications. In this paper the corrosion behavior of Sn-8Zn-3Bi lead-free solder was studied using a salt spray test. The microstructure of the solder was studied at different time intervals during the salt spray test. Sn-36Pb-2Ag (wt.%) solder joints were also studied as reference samples. It was found that Sn-8Zn-3Bi suffered from galvanic corrosion earlier than the Sn-Pb-2Ag solders. However, considerable corrosion was observed after the salt spray test in both solders. Moreover, it seemed that the corrosion performance of Sn-Pb-2Ag solder was better than that of Sn-8Zn-3Bi solder.
{"title":"Corrosion behavior of Sn-Zn-Bi and Sn-Pb-Ag solders in a salt spray test","authors":"M. Mostofizadeh, L. Frisk","doi":"10.1109/ESTC.2014.6962850","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962850","url":null,"abstract":"Most of the commonly used lead-free solders have a high melting temperature. However, in many applications a lower processing temperature would be beneficial. Therefore a demand has arisen for reliable lead-free solder with a lower melting temperature. Among the low temperature lead-free solders, Sn-9Zn and Sn-8Zn-3Bi (wt.%) are suitable candidates for many applications, since they offer good mechanical reliability and melting temperature similar to that of Sn-Pb solders. However, because they contain an active element (Zn), they need to be used with caution, especially in corrosive environments and in high-temperature applications. In this paper the corrosion behavior of Sn-8Zn-3Bi lead-free solder was studied using a salt spray test. The microstructure of the solder was studied at different time intervals during the salt spray test. Sn-36Pb-2Ag (wt.%) solder joints were also studied as reference samples. It was found that Sn-8Zn-3Bi suffered from galvanic corrosion earlier than the Sn-Pb-2Ag solders. However, considerable corrosion was observed after the salt spray test in both solders. Moreover, it seemed that the corrosion performance of Sn-Pb-2Ag solder was better than that of Sn-8Zn-3Bi solder.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121055404","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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