Pub Date : 2014-09-18DOI: 10.1109/IPFA.2014.6898202
C. Chen, H. Ng, G. Ang, J. Lam, Z. Mai
As the technology keep scaling down and IC design becoming more and more complex, failure analysis becomes more and more challenge, especially for static laser analysis. For the foundry FA or process monitoring, SRAM analysis becomes more and more critical. There are two reasons for this: The first one is that SRAM circuit is relative simple which is well known to all, it is also used by fab for monitoring structure. The second reason is the SRAM percentage on-chip keeps increasing. It can occupy more 60% chip area for most logic product. That is also another reason we use the SRAM to monitor our process. SRAM analysis with bit map is relatively easy for FA. But as DFT become more popular, the BIST technical was applied in the SRAM, bit map was provided frequently. The global fault isolation methodology must be employed in the SRAM FA. In this paper, static scanning laser methodology was applied in the SRAM FA which no bit map was provided. Hot spot was observed in the SRAM block edge for some failed units, but some not. Combined with the SRAM schematic and GDS analysis, the defect was successfully found and the failure mechanism was studied, which can successfully link the electrical phenomenon and physical defect. Also, we found the process issue with the FA result.
{"title":"Study and mechanism of static scanning laser fault isolation on embed SRAM function fail","authors":"C. Chen, H. Ng, G. Ang, J. Lam, Z. Mai","doi":"10.1109/IPFA.2014.6898202","DOIUrl":"https://doi.org/10.1109/IPFA.2014.6898202","url":null,"abstract":"As the technology keep scaling down and IC design becoming more and more complex, failure analysis becomes more and more challenge, especially for static laser analysis. For the foundry FA or process monitoring, SRAM analysis becomes more and more critical. There are two reasons for this: The first one is that SRAM circuit is relative simple which is well known to all, it is also used by fab for monitoring structure. The second reason is the SRAM percentage on-chip keeps increasing. It can occupy more 60% chip area for most logic product. That is also another reason we use the SRAM to monitor our process. SRAM analysis with bit map is relatively easy for FA. But as DFT become more popular, the BIST technical was applied in the SRAM, bit map was provided frequently. The global fault isolation methodology must be employed in the SRAM FA. In this paper, static scanning laser methodology was applied in the SRAM FA which no bit map was provided. Hot spot was observed in the SRAM block edge for some failed units, but some not. Combined with the SRAM schematic and GDS analysis, the defect was successfully found and the failure mechanism was studied, which can successfully link the electrical phenomenon and physical defect. Also, we found the process issue with the FA result.","PeriodicalId":409316,"journal":{"name":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"47 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114030636","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-18DOI: 10.1109/IPFA.2014.6898140
C. K. Lau, C. H. Tan
This paper presents the failure analysis steps that localized and revealed the embedded Zn-Mo particle bridging two adjacent metal traces on a non-passivated MOSFET chip by using backside TIVA, frontside parallel polishing and EDX. TIVA emission spot localized between two metal traces indicates a high probability of particle defect.
{"title":"Failure analysis of Zn-Mo particle in the molding compound causing gate-source short in non-passivated MOSFET device","authors":"C. K. Lau, C. H. Tan","doi":"10.1109/IPFA.2014.6898140","DOIUrl":"https://doi.org/10.1109/IPFA.2014.6898140","url":null,"abstract":"This paper presents the failure analysis steps that localized and revealed the embedded Zn-Mo particle bridging two adjacent metal traces on a non-passivated MOSFET chip by using backside TIVA, frontside parallel polishing and EDX. TIVA emission spot localized between two metal traces indicates a high probability of particle defect.","PeriodicalId":409316,"journal":{"name":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132594778","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-18DOI: 10.1109/IPFA.2014.6898183
K. Lai, A. Teng, C. Tu, T. Chang, Julia Hsueh, M.Y. Lee, A. Kuo, Y. Chao, Scott Hu, U. J. Tzeng, C.Y. Lu
After 500-hour HTOL reliability test on memory device, off-state leakage was found in nMOSFETs of word-line decoder. According to electrical and physical failure analysis on IC and device level, we found that holes were trapped in SiN of STI edge, which lowered threshold voltage of nMOSFETs and lead to off-state leakage from drain to source. The hole-traps came from anode gate low current flow and were trapped in SiN layer. The hole-traps could be annihilated by electron beams from SEM, and this phenomenon might mislead judgment during failure analysis. Detailed failure analysis, failure mechanism and corresponding improvement of circuit and process are presented in this paper.
{"title":"Failure analysis of off-state leakage in high-voltage word-line decoder circuit of memory device","authors":"K. Lai, A. Teng, C. Tu, T. Chang, Julia Hsueh, M.Y. Lee, A. Kuo, Y. Chao, Scott Hu, U. J. Tzeng, C.Y. Lu","doi":"10.1109/IPFA.2014.6898183","DOIUrl":"https://doi.org/10.1109/IPFA.2014.6898183","url":null,"abstract":"After 500-hour HTOL reliability test on memory device, off-state leakage was found in nMOSFETs of word-line decoder. According to electrical and physical failure analysis on IC and device level, we found that holes were trapped in SiN of STI edge, which lowered threshold voltage of nMOSFETs and lead to off-state leakage from drain to source. The hole-traps came from anode gate low current flow and were trapped in SiN layer. The hole-traps could be annihilated by electron beams from SEM, and this phenomenon might mislead judgment during failure analysis. Detailed failure analysis, failure mechanism and corresponding improvement of circuit and process are presented in this paper.","PeriodicalId":409316,"journal":{"name":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130135279","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-18DOI: 10.1109/IPFA.2014.6898157
S. Chef, S. Jacquir, P. Perdu, K. Sanchez, S. Binczak
If scaling has the benefit of enabling manufacturers to design tomorrow's integrated circuits, from the failure analyst point of view it also has the drawback of making devices more complex. The test sequence for modern VLSI can be quite long, with thousands of vector. Dynamic photon emission databases can contain millions of photons representing thousands of state changes in the region of interest. Finding a candidate location where to perform physical analysis is quite challenging, especially if the fault occurs on a single vector. In this paper, we suggest a new methodology to find single vector fault in dynamic photon emission database. The process is applied at the post-acquisition level and is based on clustering algorithm and nearest neighbor research.
{"title":"Cluster matching in time resolved imaging for VLSI analysis","authors":"S. Chef, S. Jacquir, P. Perdu, K. Sanchez, S. Binczak","doi":"10.1109/IPFA.2014.6898157","DOIUrl":"https://doi.org/10.1109/IPFA.2014.6898157","url":null,"abstract":"If scaling has the benefit of enabling manufacturers to design tomorrow's integrated circuits, from the failure analyst point of view it also has the drawback of making devices more complex. The test sequence for modern VLSI can be quite long, with thousands of vector. Dynamic photon emission databases can contain millions of photons representing thousands of state changes in the region of interest. Finding a candidate location where to perform physical analysis is quite challenging, especially if the fault occurs on a single vector. In this paper, we suggest a new methodology to find single vector fault in dynamic photon emission database. The process is applied at the post-acquisition level and is based on clustering algorithm and nearest neighbor research.","PeriodicalId":409316,"journal":{"name":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123065817","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-18DOI: 10.1109/IPFA.2014.6898134
Rachel Siew, W. F. Kho
A single bit cell SRAM failure with shorted bit line (BL) and bit line bar (BLB) storage nodes were analyzed. Instead of using top down deprocessing to localize the defect, a modified approach incorporating Atomic Force Probe (AFP) and STEM dark field imaging of a thick sample were used. Using the modified approach the single bit cell failure was found to be due to a titanium particle on the spacer of a transistor that shorted the polysilicon gate and active silicon.
{"title":"Single bit cell SRAM failure due to titanium particle","authors":"Rachel Siew, W. F. Kho","doi":"10.1109/IPFA.2014.6898134","DOIUrl":"https://doi.org/10.1109/IPFA.2014.6898134","url":null,"abstract":"A single bit cell SRAM failure with shorted bit line (BL) and bit line bar (BLB) storage nodes were analyzed. Instead of using top down deprocessing to localize the defect, a modified approach incorporating Atomic Force Probe (AFP) and STEM dark field imaging of a thick sample were used. Using the modified approach the single bit cell failure was found to be due to a titanium particle on the spacer of a transistor that shorted the polysilicon gate and active silicon.","PeriodicalId":409316,"journal":{"name":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132560879","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-18DOI: 10.1109/IPFA.2014.6898184
A. Bag, M. K. Hota, S. Mallik, C. Maiti
We report bipolar resistive switching phenomena observed in different types of plant and animal proteins. Using protein as the switching medium, resistive switching devices have been fabricated with conducting indium tin oxide (ITO) and Al as bottom and top electrodes, respectively. A clockwise bipolar resistive switching phenomenon is observed in all proteins. It is shown that the resistive switching phenomena originate from the local redox process in the protein and the ion exchange from the top electrode/protein interface.
{"title":"Bipolar resistive switching in different plant and animal proteins","authors":"A. Bag, M. K. Hota, S. Mallik, C. Maiti","doi":"10.1109/IPFA.2014.6898184","DOIUrl":"https://doi.org/10.1109/IPFA.2014.6898184","url":null,"abstract":"We report bipolar resistive switching phenomena observed in different types of plant and animal proteins. Using protein as the switching medium, resistive switching devices have been fabricated with conducting indium tin oxide (ITO) and Al as bottom and top electrodes, respectively. A clockwise bipolar resistive switching phenomenon is observed in all proteins. It is shown that the resistive switching phenomena originate from the local redox process in the protein and the ion exchange from the top electrode/protein interface.","PeriodicalId":409316,"journal":{"name":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"151 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132571234","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-18DOI: 10.1109/IPFA.2014.6898175
Yandong He, Ganggang Zhang, Xing Zhang
Self-heating enhanced degradation in pLDMOSFETs was studied by non-destructive MR-DCIV method. Due to self-heating effect in pLDMOSFETs, several times larger MR-DCIV degradation per finger was observed for multi-finger devices with higher temperature rise and less channel edge heat dissipation. Our study has shown that self-heating induced degradation shared the similar trends and mechanism to NBTI.
{"title":"Understanding of self-heating enhanced degradation in pLDMOSFETs by MR-DCIV method","authors":"Yandong He, Ganggang Zhang, Xing Zhang","doi":"10.1109/IPFA.2014.6898175","DOIUrl":"https://doi.org/10.1109/IPFA.2014.6898175","url":null,"abstract":"Self-heating enhanced degradation in pLDMOSFETs was studied by non-destructive MR-DCIV method. Due to self-heating effect in pLDMOSFETs, several times larger MR-DCIV degradation per finger was observed for multi-finger devices with higher temperature rise and less channel edge heat dissipation. Our study has shown that self-heating induced degradation shared the similar trends and mechanism to NBTI.","PeriodicalId":409316,"journal":{"name":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126234863","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-18DOI: 10.1109/IPFA.2014.6898200
Binghai Liu, E. Er, S. Zhao, C. Chen, A. G. Boon, Kunihiko Takahashi, C. Subbu, J. Lam
In this work we reported a case study on ET (electrical testing) failure with via high resistance issue. In order to understand the failure mechanism and root cause behind the high via resistance, detailed TEM(transmission electron microscope) analysis was performed by using various TEM FA (failure analysis)techniques, including EDX, EELS analysis. It was found out that high via resistance arose from the process drift-induced Al extrusion and poor barrier metal coverage at via bottom. The correlation between the physical signatures identified by TEM FA and the associated processes were discussed for the root cause understanding.
{"title":"Study on the high via resistance by TEM failure analysis","authors":"Binghai Liu, E. Er, S. Zhao, C. Chen, A. G. Boon, Kunihiko Takahashi, C. Subbu, J. Lam","doi":"10.1109/IPFA.2014.6898200","DOIUrl":"https://doi.org/10.1109/IPFA.2014.6898200","url":null,"abstract":"In this work we reported a case study on ET (electrical testing) failure with via high resistance issue. In order to understand the failure mechanism and root cause behind the high via resistance, detailed TEM(transmission electron microscope) analysis was performed by using various TEM FA (failure analysis)techniques, including EDX, EELS analysis. It was found out that high via resistance arose from the process drift-induced Al extrusion and poor barrier metal coverage at via bottom. The correlation between the physical signatures identified by TEM FA and the associated processes were discussed for the root cause understanding.","PeriodicalId":409316,"journal":{"name":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115154073","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-06-01DOI: 10.1109/IPFA.2014.6898180
Yutian Zhang, Junzhi Sang, Yun Xu, Zhimin Zeng
On a new embedded flash platform we have got high failure rate on charge pump test. It is impossible to directly force external current into failure signal path to do FA but we did it under dynamic condition. Afterwards we have captured metal short locations by emission scope which is rarely seen. Then we used in-line KLA SEM VC scan to define the real failure mechanism - a new type of antenna effect, and finally solved it with combined process condition changes. We named the new type of antenna effect “Floating Antenna Effect”.
在一个新的嵌入式闪存平台上，电荷泵测试的故障率很高。直接将外部电流强制进入故障信号通路进行故障分析是不可能的，但我们在动态条件下进行了故障分析。然后我们通过发射范围捕获了金属短位置，这是罕见的。然后利用在线KLA SEM VC扫描确定了真正的失效机制——一种新型的天线效应，并结合工艺条件的变化对其进行了求解。我们将这种新型天线效应命名为“浮动天线效应”。
{"title":"Finding a new type of in-line failure mechanism “Floating Antenna Effect” and its solution","authors":"Yutian Zhang, Junzhi Sang, Yun Xu, Zhimin Zeng","doi":"10.1109/IPFA.2014.6898180","DOIUrl":"https://doi.org/10.1109/IPFA.2014.6898180","url":null,"abstract":"On a new embedded flash platform we have got high failure rate on charge pump test. It is impossible to directly force external current into failure signal path to do FA but we did it under dynamic condition. Afterwards we have captured metal short locations by emission scope which is rarely seen. Then we used in-line KLA SEM VC scan to define the real failure mechanism - a new type of antenna effect, and finally solved it with combined process condition changes. We named the new type of antenna effect “Floating Antenna Effect”.","PeriodicalId":409316,"journal":{"name":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117341337","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-06-01DOI: 10.1109/IPFA.2014.6898185
Poo Khai Yee, Wan Tatt Wai, Yong Foo Khong
Electroless Nickel deposition on Copper metallization required a thin Palladium layer (<; 5nm) as catalyst for Copper activation purpose. By using several physical failure analysis approaches, Palladium-Copper inter-diffusion behavior was proven affected by flow rate variation of chemical solution during Copper activation process.
{"title":"Palladium-copper inter-diffusion during copper activation for electroless Nickel plating process on Copper power metal","authors":"Poo Khai Yee, Wan Tatt Wai, Yong Foo Khong","doi":"10.1109/IPFA.2014.6898185","DOIUrl":"https://doi.org/10.1109/IPFA.2014.6898185","url":null,"abstract":"Electroless Nickel deposition on Copper metallization required a thin Palladium layer (<; 5nm) as catalyst for Copper activation purpose. By using several physical failure analysis approaches, Palladium-Copper inter-diffusion behavior was proven affected by flow rate variation of chemical solution during Copper activation process.","PeriodicalId":409316,"journal":{"name":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116251868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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