Pub Date : 2025-08-29DOI: 10.1016/j.sse.2025.109222
Hyo-Joung Kim , Walid Amir , Surajit Chakraborty , Ju-Won Shin , Ki-Young Shin , Hyuk-Min Kwon , Tae-Woo Kim
In GaN-based High-Electron Mobility Transistors (HEMTs), the carrier transport properties of the 2-Dimensional Electron Gas (2DEG), specifically the saturation velocity (υsat) and effective mobility (μn_eff,), are critical determinants of device performance. To enhance these properties, we conducted structural optimizations, which included reducing the Al mole fraction in the AlxGa1-xN barrier and introducing an AlGaN back barrier. Recognizing the limitations of traditional extraction techniques, we employed transconductance modeling to accurately extract effective mobility and saturation velocity values. The implementation of the AlGaN back barrier resulted in an effective mobility enhancement to 748 cm2/V·s. Additionally, reducing the Al mole fraction in the AlxGa1-xN top barrier led to an effective mobility improvement of 484 cm2/V·s. These findings provide valuable insights into the design of epitaxial structures for AlGaN/GaN HEMTs aimed at achieving superior performance in future applications.
{"title":"Enhancing carrier transport in AlGaN/GaN HEMTs through structural optimization and transconductance modeling","authors":"Hyo-Joung Kim , Walid Amir , Surajit Chakraborty , Ju-Won Shin , Ki-Young Shin , Hyuk-Min Kwon , Tae-Woo Kim","doi":"10.1016/j.sse.2025.109222","DOIUrl":"10.1016/j.sse.2025.109222","url":null,"abstract":"<div><div>In GaN-based High-Electron Mobility Transistors (HEMTs), the carrier transport properties of the 2-Dimensional Electron Gas (2DEG), specifically the saturation velocity (<em>υ<sub>sat</sub></em>) and effective mobility (<em>μ<sub>n_eff</sub></em>,), are critical determinants of device performance. To enhance these properties, we conducted structural optimizations, which included reducing the Al mole fraction in the Al<sub>x</sub>Ga<sub>1-x</sub>N barrier and introducing an AlGaN back barrier. Recognizing the limitations of traditional extraction techniques, we employed transconductance modeling to accurately extract effective mobility and saturation velocity values. The implementation of the AlGaN back barrier resulted in an effective mobility enhancement to 748 cm<sup>2</sup>/V·s. Additionally, reducing the Al mole fraction in the Al<sub>x</sub>Ga<sub>1-x</sub>N top barrier led to an effective mobility improvement of 484 cm<sup>2</sup>/V·s. These findings provide valuable insights into the design of epitaxial structures for AlGaN/GaN HEMTs aimed at achieving superior performance in future applications.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109222"},"PeriodicalIF":1.4,"publicationDate":"2025-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144988015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-29DOI: 10.1016/j.sse.2025.109228
R. Goyal, A. Crespo-Yepes, M. Porti, R. Rodriguez, M. Nafria
Dielectric Breakdown, which has been associated with the progressive wear-out of the gate dielectric, has been one of the most detrimental failure mechanisms in CMOS devices. With downscaling, new device architectures and/or materials have been introduced, so, it is necessary to evaluate the BD impact at device (and circuit) level in these new structures. In this work, the dielectric BD and the post-BD behavior in largely scaled FDSOI nanowire transistors with high-k gate dielectric have been characterized, using the energy and the power dissipated by the device under test as key parameters. The experimental results evidence the presence of new detrimental effects for the device’s integrity beyond the traditional dielectric BD.
{"title":"On the role of power dissipation in the Post-BD behavior of FDSOI NanoWire FETs","authors":"R. Goyal, A. Crespo-Yepes, M. Porti, R. Rodriguez, M. Nafria","doi":"10.1016/j.sse.2025.109228","DOIUrl":"10.1016/j.sse.2025.109228","url":null,"abstract":"<div><div>Dielectric Breakdown, which has been associated with the progressive wear-out of the gate dielectric, has been one of the most detrimental failure mechanisms in CMOS devices. With downscaling, new device architectures and/or materials have been introduced, so, it is necessary to evaluate the BD impact at device (and circuit) level in these new structures. In this work, the dielectric BD and the post-BD behavior in largely scaled FDSOI nanowire transistors with high-k gate dielectric have been characterized, using the energy and the power dissipated by the device under test as key parameters. The experimental results evidence the presence of new detrimental effects for the device’s integrity beyond the traditional dielectric BD.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109228"},"PeriodicalIF":1.4,"publicationDate":"2025-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144933522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-26DOI: 10.1016/j.sse.2025.109224
Pierre Lhéritier , Daphnée Bosch , Giovanni Romano , Fabienne Ponthenier , Sylvain Joblot , Joris Lacord
This work studies the threshold voltage mismatch of mesa-isolated SOI pMOSFETs through a breakdown between edge and center contributions. Pelgrom’s law is followed if a proper care is taken in the Vt extraction method. Applied to pMOS devices we observed that despite its parasitic nature, the edge transistor mismatch is as good as that of the center, regardless of channel doping and back-gate bias. Mismatch degradation in reverse back-bias mode is observed and attributed to the presence of floating body effects.
{"title":"Non-uniform matching performances in mesa-isolated SOI MOSFETs","authors":"Pierre Lhéritier , Daphnée Bosch , Giovanni Romano , Fabienne Ponthenier , Sylvain Joblot , Joris Lacord","doi":"10.1016/j.sse.2025.109224","DOIUrl":"10.1016/j.sse.2025.109224","url":null,"abstract":"<div><div>This work studies the threshold voltage mismatch of mesa-isolated SOI pMOSFETs through a breakdown between edge and center contributions. Pelgrom’s law is followed if a proper care is taken in the Vt extraction method. Applied to pMOS devices we observed that despite its parasitic nature, the edge transistor mismatch is as good as that of the center, regardless of channel doping and back-gate bias. Mismatch degradation in reverse back-bias mode is observed and attributed to the presence of floating body effects.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109224"},"PeriodicalIF":1.4,"publicationDate":"2025-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144988849","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-26DOI: 10.1016/j.sse.2025.109223
Piotr Wiśniewski , Andrzej Mazurak , Alicja Kądziela , Maciej Filipiak , Bartłomiej Stonio , Romuald B. Beck
In this work, we study the silicon-oxide resistive switching memory based on the hydrogen silsesquioxane (HSQ) layer. We fabricated the Al/HSQ/n++ − Si RRAM (Resistive Random Access Memory) devices and performed electrical characterization. Transport mechanisms for different voltage ranges in High Resistance State (HRS) and Low Resistance State (LRS) were identified and analyzed. We show that spin on the silicon oxide layer can result in good resistive switching properties that can be utilized in the design and fabrication of RRAM devices.
{"title":"Silicon-oxide resistive switching memory based on the HSQ layer","authors":"Piotr Wiśniewski , Andrzej Mazurak , Alicja Kądziela , Maciej Filipiak , Bartłomiej Stonio , Romuald B. Beck","doi":"10.1016/j.sse.2025.109223","DOIUrl":"10.1016/j.sse.2025.109223","url":null,"abstract":"<div><div>In this work, we study the silicon-oxide resistive switching memory based on the hydrogen silsesquioxane (HSQ) layer. We fabricated the Al/HSQ/n++ − Si RRAM (Resistive Random Access Memory) devices and performed electrical characterization. Transport mechanisms for different voltage ranges in High Resistance State (HRS) and Low Resistance State (LRS) were identified and analyzed. We show that spin on the silicon oxide layer can result in good resistive switching properties that can be utilized in the design and fabrication of RRAM devices.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109223"},"PeriodicalIF":1.4,"publicationDate":"2025-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144933521","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-26DOI: 10.1016/j.sse.2025.109210
Josef Gull, Hans Kosina
A novel two-particle Monte Carlo (MC) transport model has been developed and applied to determine the energy distribution function (EDF) in a MOSFET. A dedicated statistical enhancement algorithm enhances the number of samples at higher energies. A comparison with the well-established one-particle MC method and a related enhancement method is presented.
{"title":"Statistical enhancement in two-particle Device Monte Carlo","authors":"Josef Gull, Hans Kosina","doi":"10.1016/j.sse.2025.109210","DOIUrl":"10.1016/j.sse.2025.109210","url":null,"abstract":"<div><div>A novel two-particle Monte Carlo (MC) transport model has been developed and applied to determine the energy distribution function (EDF) in a MOSFET. A dedicated statistical enhancement algorithm enhances the number of samples at higher energies. A comparison with the well-established one-particle MC method and a related enhancement method is presented.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109210"},"PeriodicalIF":1.4,"publicationDate":"2025-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144902954","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-23DOI: 10.1016/j.sse.2025.109216
Tommaso Ugolini, Elena Gnani
As the development of Dirac-Source Field-Effect Transistors (DS-FETs) progresses, there is an increasing need for a robust, flexible, and agile simulation framework capable of evaluating device performance across a range of operating conditions. This work addresses that need by coupling a two-dimensional (2D) Poisson solver with a quantum transport model under the ballistic transport regime. This simulation approach is employed to analyze the electrical characteristics of a DS-FET realized with the heterojunction of graphene and monolayer MoS. In addition, the impact of gate-to-channel alignment on device performance is systematically investigated. Simulation results underscore the critical role of full gate overlap with the semiconducting region and substantiate the feasibility of DS-FETs based on these two materials.
{"title":"Design guidelines for Gr-MoS2 based DS-FETs","authors":"Tommaso Ugolini, Elena Gnani","doi":"10.1016/j.sse.2025.109216","DOIUrl":"10.1016/j.sse.2025.109216","url":null,"abstract":"<div><div>As the development of Dirac-Source Field-Effect Transistors (DS-FETs) progresses, there is an increasing need for a robust, flexible, and agile simulation framework capable of evaluating device performance across a range of operating conditions. This work addresses that need by coupling a two-dimensional (2D) Poisson solver with a quantum transport model under the ballistic transport regime. This simulation approach is employed to analyze the electrical characteristics of a DS-FET realized with the heterojunction of graphene and monolayer MoS<span><math><msub><mrow></mrow><mrow><mn>2</mn></mrow></msub></math></span>. In addition, the impact of gate-to-channel alignment on device performance is systematically investigated. Simulation results underscore the critical role of full gate overlap with the semiconducting region and substantiate the feasibility of DS-FETs based on these two materials.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109216"},"PeriodicalIF":1.4,"publicationDate":"2025-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144895146","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-23DOI: 10.1016/j.sse.2025.109217
Fernando Pizzo Ribeiro, Egon H.S. Galembeck, Salvador Pinillos Gimenez
In this study, an innovative solar cell (SC) design is proposed and analyzed using the Sentaurus Technology Computer-Aided Design (TCAD) simulator. Departing from conventional rectangular architecture, a half-circular geometry is introduced to improve light absorption and enhance electrical performance. The simulation framework models the solar cell’s behavior under standard test conditions, incorporating realistic material properties and stratified layer structures. Key electrical performance metrics, Fill Factor (FF), and conversion Efficiency are evaluated. The results demonstrate that the half-circular configuration achieves an energy conversion efficiency of 15.33 %, and an FF of 74.2 %. This work lays the groundwork for future experimental validation and encourages the investigation of alternative geometries to improve photovoltaic device performance further.
{"title":"Boosting the electrical performance of solar cells by using PIN diode structure with different layout styles controlled by MOS capacitor","authors":"Fernando Pizzo Ribeiro, Egon H.S. Galembeck, Salvador Pinillos Gimenez","doi":"10.1016/j.sse.2025.109217","DOIUrl":"10.1016/j.sse.2025.109217","url":null,"abstract":"<div><div>In this study, an innovative solar cell (SC) design is proposed and analyzed using the Sentaurus Technology Computer-Aided Design (TCAD) simulator. Departing from conventional rectangular architecture, a half-circular geometry is introduced to improve light absorption and enhance electrical performance. The simulation framework models the solar cell’s behavior under standard test conditions, incorporating realistic material properties and stratified layer structures. Key electrical performance metrics, Fill Factor (FF), and conversion Efficiency are evaluated. The results demonstrate that the half-circular configuration achieves an energy conversion efficiency of 15.33 %, and an FF of 74.2 %. This work lays the groundwork for future experimental validation and encourages the investigation of alternative geometries to improve photovoltaic device performance further.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109217"},"PeriodicalIF":1.4,"publicationDate":"2025-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144988850","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-23DOI: 10.1016/j.sse.2025.109221
Andreas Fuchsberger , Lukas Wind , Aníbal Pacheco-Sanchez , Johannes Aberl , Moritz Brehm , Lilian Vogl , Peter Schweizer , Masiar Sistani , Walter M. Weber
Advancing SOI-based transistors with Ge-rich layers aims to increase device performance in terms of on-state operation and switching speed. Here, we investigate multi-heterojunction SiGe-based Schottky barrier FETs with Ge concentrations up to 75% by means of temperature- dependent electrical characterizations to identify the transport regimes and the effective barrier heights with a thermionic-emission-based model. Importantly, incorporating 33% Ge gives the best compromise for n- and p-type on-state symmetry. As the Ge concentration increases, the p-type on-state current becomes dominant, which is interesting for low-power p-type transistors.
{"title":"A Schottky barrier field-effect transistor platform with variable Ge content on SOI","authors":"Andreas Fuchsberger , Lukas Wind , Aníbal Pacheco-Sanchez , Johannes Aberl , Moritz Brehm , Lilian Vogl , Peter Schweizer , Masiar Sistani , Walter M. Weber","doi":"10.1016/j.sse.2025.109221","DOIUrl":"10.1016/j.sse.2025.109221","url":null,"abstract":"<div><div>Advancing SOI-based transistors with Ge-rich layers aims to increase device performance in terms of on-state operation and switching speed. Here, we investigate multi-heterojunction SiGe-based Schottky barrier FETs with Ge concentrations up to 75% by means of temperature- dependent electrical characterizations to identify the transport regimes and the effective barrier heights with a thermionic-emission-based model. Importantly, incorporating 33% Ge gives the best compromise for n- and p-type on-state symmetry. As the Ge concentration increases, the p-type on-state current becomes dominant, which is interesting for low-power p-type transistors.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109221"},"PeriodicalIF":1.4,"publicationDate":"2025-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144908455","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-23DOI: 10.1016/j.sse.2025.109213
L. Donetti, C. Medina-Bailon, J.L. Padilla, C. Sampedro, F. Gamiz
In this work, we present Mulhacen, a 3D multi-subband simulator developed for the accurate study of nonplanar devices which are at the core of present and future technology nodes. It allows to consider electrons in different conduction band valleys and, among its main features, we can highlight the accurate evaluation of quantum effects in the plane transverse to transport through the solution of the 2D Schrödinger equation in several device cross sections, as well as Monte Carlo description of transport. The simulator is based on a finite elements discretization, which allows an accurate description of realistic device geometries.
{"title":"MULHACEN, enhanced multi-subband Monte Carlo simulator for nonplanar FETs","authors":"L. Donetti, C. Medina-Bailon, J.L. Padilla, C. Sampedro, F. Gamiz","doi":"10.1016/j.sse.2025.109213","DOIUrl":"10.1016/j.sse.2025.109213","url":null,"abstract":"<div><div>In this work, we present <span>Mulhacen</span>, a 3D multi-subband simulator developed for the accurate study of nonplanar devices which are at the core of present and future technology nodes. It allows to consider electrons in different conduction band valleys and, among its main features, we can highlight the accurate evaluation of quantum effects in the plane transverse to transport through the solution of the 2D Schrödinger equation in several device cross sections, as well as Monte Carlo description of transport. The simulator is based on a finite elements discretization, which allows an accurate description of realistic device geometries.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109213"},"PeriodicalIF":1.4,"publicationDate":"2025-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144895147","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-08-22DOI: 10.1016/j.sse.2025.109220
Rezwana Sultana , Karimul Islam , Piotr Jeżak , Robert Mroczyński
This study investigates the frequency-dependent dielectric properties of ultrathin HfOx-TiOx composite films (HTO) in a metal–oxide–semiconductor (MOS) configuration over a frequency range of 1 kHz to 3 MHz. The films were deposited using a pulsed-DC magnetron sputtering technique in an atomic layer deposition-like manner, incorporating very thin TiOx layers within the bulk of HfOx. Structural analysis revealed that the films are amorphous and exhibit uniform and smooth surfaces. The dielectric constant (ε′) and dielectric loss (ε′′) exhibit a decreasing trend with increasing frequency, demonstrating typical dielectric behavior. Furthermore, the characteristic dielectric relaxation frequency shifts toward lower frequency values with the insertion of TiOx. The Cole-Cole plot confirms the non-Debye relaxation behavior across all samples. Optical spectroscopy analysis reveals a systematic increase in the optical band gap upon more TiOx insertion. Analysis of current–voltage (I-V) characteristics demonstrates low leakage currents across the composite films. Understanding the dielectric parameters and the electrical characteristics is crucial for the potential application of these films in advanced electronic applications.
{"title":"Frequency-driven dielectric analysis of ultrathin HfOx-TiOx composite films","authors":"Rezwana Sultana , Karimul Islam , Piotr Jeżak , Robert Mroczyński","doi":"10.1016/j.sse.2025.109220","DOIUrl":"10.1016/j.sse.2025.109220","url":null,"abstract":"<div><div>This study investigates the frequency-dependent dielectric properties of ultrathin HfO<sub>x</sub>-TiO<sub>x</sub> composite films (HTO) in a metal–oxide–semiconductor (MOS) configuration over a frequency range of 1 kHz to 3 MHz. The films were deposited using a pulsed-DC magnetron sputtering technique in an atomic layer deposition-like manner, incorporating very thin TiO<sub>x</sub> layers within the bulk of HfO<sub>x</sub>. Structural analysis revealed that the films are amorphous and exhibit uniform and smooth surfaces. The dielectric constant (<em>ε</em>′) and dielectric loss (<em>ε</em>′′) exhibit a decreasing trend with increasing frequency, demonstrating typical dielectric behavior. Furthermore, the characteristic dielectric relaxation frequency shifts toward lower frequency values with the insertion of TiO<sub>x</sub>. The Cole-Cole plot confirms the non-Debye relaxation behavior across all samples. Optical spectroscopy analysis reveals a systematic increase in the optical band gap upon more TiO<sub>x</sub> insertion. Analysis of current–voltage (I-V) characteristics demonstrates low leakage currents across the composite films. Understanding the dielectric parameters and the electrical characteristics is crucial for the potential application of these films in advanced electronic applications.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109220"},"PeriodicalIF":1.4,"publicationDate":"2025-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144908456","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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