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Study on drain bias dependence of Y-parameters under on-state condition in GaN HEMTs using low-frequency vector network analyzer and device simulation 基于低频矢量网络分析仪和器件仿真的GaN hemt导通条件下y参数漏极偏置依赖性研究
IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-09-17 DOI: 10.1016/j.sse.2025.109245
Toshiyuki Oishi , Ken Kudara , Yutaro Yamaguchi , Shintaro Shinjo , Koji Yamanaka , Saga University , Mitsubishi Electric Corporation
The drain bias dependence of low-frequency Y-parameters under on-state conditions in Gallium Nitride high electron mobility transistors (GaN HEMTs) is investigated using experimental results and device simulation. The Y-parameters for broadband frequencies from 10 Hz to 100 MHz were systematically measured using a vector network analyzer for drain voltage from 3 to 30 V at the gate voltage of 0 V from room temperature to 120 degrees Celsius. Six signals with the peaks were observed in the imaginary parts (Im) of Y22 and Y21. These peaks were categorized into two groups. One is that the peaks appeared around 5 MHz and have negative slopes in Arrhenius plots. Another is that the peaks appeared below 150 kHz and have an activation energy that can be estimated from Arrhenius plots. The second group was further divided into peaks appeared in both Im(Y22) and Im(Y21), and those that appeared only in Im(Y21). The device simulation including self-heating effects was performed using the trap parameters estimated from the experimental results. Both DC and Y-parameter characteristics for the simulation have good agreement with the experimental results. By the simulation for the individual effects, the peaks around 5 MHz result from the heat generation in GaN HEMTs. The peaks below 150 kHz are considered to originate from the traps in AlGaN and GaN layers. The traps in the GaN layer generate the peaks in both Im(Y22) and Im(Y21), while the traps in the AlGaN layer generate peaks in only Im(Y21).
利用实验结果和器件仿真研究了氮化镓高电子迁移率晶体管(GaN HEMTs)中低频y参数在通态条件下的漏极偏置依赖性。利用矢量网络分析仪系统测量了宽带频率为10 Hz至100 MHz,栅极电压为0 V,漏极电压为3至30 V,室温至120摄氏度范围内的y参数。在Y22和Y21的虚部(Im)观察到6个有峰的信号。这些峰被分为两组。一是在阿累尼乌斯图中,峰出现在5mhz左右,呈负斜率。另一个是峰出现在150khz以下,其活化能可以由Arrhenius图估计。第二组进一步分为同时出现在Im(Y22)和Im(Y21)的峰,以及只出现在Im(Y21)的峰。利用实验结果估计的阱参数,进行了包含自热效应的器件仿真。仿真得到的直流和y参数特性与实验结果吻合较好。通过对单个效应的模拟,5mhz左右的峰值是由GaN hemt中的发热产生的。150 kHz以下的峰被认为是来自于AlGaN和GaN层中的陷阱。GaN层中的陷阱在Im(Y22)和Im(Y21)中都产生峰,而AlGaN层中的陷阱只在Im(Y21)中产生峰。
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引用次数: 0
ZnPc-based schottky diodes: Effect of amorphous polymer interlayers on electrical and structural properties zno基肖特基二极管:非晶聚合物中间层对电学和结构性能的影响
IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-09-16 DOI: 10.1016/j.sse.2025.109249
Nargis Khatun , Sumona Sinha , A.K.M. Maidul Islam
This study investigates the influence of Indium Tin Oxide (ITO) electrode surface modification on the electrical properties of zinc phthalocyanine (ZnPc)– based Schottky diodes, using amorphous polymers, specifically polystyrene (Ps) and poly(butyl methacrylate) (PBMA). Devices with configurations of Al (Aluminum)/ZnPc/ITO, Al/ZnPc/Ps/ITO, and Al/ZnPc/PBMA/ITO were fabricated and analysed through current–voltage (I-V) characterisation. Devices modified with polymers showed significantly improved electrical performance, with the rectification ratio rising from 0.81 (pure ZnPc) to 4.24 for ITO modified with PBMA and 6.32 for ITO modified with Ps, along with optimised ideality factors and reduced series resistance. Space-charge-limited conduction (SCLC) became dominant, indicating enhanced charge mobility in the modified devices. UV–Vis analysis further confirmed this improvement, showing that PBMA modification enhances π–π* interactions and molecular aggregation within ZnPc thin films, reducing the optical bandgap from 3.05 eV to 2.75 eV (Ps) and 2.68 eV (PBMA), which indicates modified electronic properties due to polymer incorporation. Structural investigations employing XRR and AFM complement these findings, demonstrating improved crystallite size and a smoother surface, which lead to better charge transport. These results highlight the efficiency of polymer surface modification in enhancing ZnPc-based Schottky diodes, presenting intriguing possibilities for future optoelectronic applications.
本研究研究了铟锡氧化物(ITO)电极表面改性对酞菁锌(ZnPc)基肖特基二极管电性能的影响,采用非晶态聚合物,特别是聚苯乙烯(Ps)和聚甲基丙烯酸丁酯(PBMA)。制备了具有Al (Aluminum)/ZnPc/ITO、Al/ZnPc/Ps/ITO和Al/ZnPc/PBMA/ITO结构的器件,并通过电流-电压(I-V)表征对其进行了分析。用聚合物修饰的器件表现出显著改善的电性能,整流比从0.81(纯ZnPc)上升到PBMA修饰的ITO的4.24和Ps修饰的ITO的6.32,同时优化了理想因子和降低了串联电阻。空间电荷限制传导(SCLC)成为主导,表明改进后的器件中电荷迁移率增强。UV-Vis分析进一步证实了这一改进,表明PBMA修饰增强了ZnPc薄膜内π -π *相互作用和分子聚集,将光学带隙从3.05 eV减小到2.75 eV (Ps)和2.68 eV (PBMA),这表明聚合物掺入修饰了电子性能。利用XRR和AFM的结构研究补充了这些发现,证明了改进的晶体尺寸和更光滑的表面,导致更好的电荷传输。这些结果突出了聚合物表面改性在增强znpc基肖特基二极管方面的效率,为未来光电应用提供了有趣的可能性。
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引用次数: 0
Comparative effects of plasma treatments on SiO2 surface and bonding performance for wafer and hybrid bonding 等离子体处理对硅片和杂化键合SiO2表面和键合性能的影响
IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-09-16 DOI: 10.1016/j.sse.2025.109246
Sung-Min Park , Sang Hyun Jung , Joong-Heon Kim , Seung Heon Shin , Jaejin Lee
We investigate the effects of plasma on SiO2 surfaces in various plasma environments, including Ar, O2, and N2, under identical plasma conditions for low-temperature annealing in SiO2/SiO2 wafer bonding. After plasma treatments, no damage is observed on the SiO2 surface, which is comparable to post-CMP SiO2. With the Ar and O2 plasma treatments and XPS analysis, the SiO2 surface shows a Si-OH-rich surface and changes to more hydrophilic properties. Although N2 plasma treatment results in a few isolated voids being observed compared to O2 plasma treatment, N2 plasma treatment will be a suitable choice for Cu/SiO2 hybrid bonding thanks to its highest bonding strength compared to other plasma treatments and the ability to avoid Cu oxidation. On the other hand, O2 plasma treatment on SiO2 surface is the most effective way for SiO2/SiO2 wafer bonding providing excellent hydrophilicity, strong bonding strength, and minimal bonding voids.
在相同的等离子体条件下,研究了不同等离子体环境下等离子体对SiO2表面的影响,包括Ar、O2和N2,用于SiO2/SiO2晶圆键合的低温退火。等离子体处理后,SiO2表面未观察到任何损伤,这与cmp后的SiO2相当。通过Ar和O2等离子体处理和XPS分析,SiO2表面呈现出富含si - oh的表面,并转变为更亲水的性质。尽管与O2等离子体处理相比,N2等离子体处理只会导致一些孤立的空洞,但由于与其他等离子体处理相比,N2等离子体处理具有最高的结合强度,并且能够避免Cu氧化,因此将成为Cu/SiO2杂化键合的合适选择。另一方面,在SiO2表面进行O2等离子体处理是最有效的SiO2/SiO2晶圆键合方式,具有优异的亲水性、强的键合强度和最小的键合空洞。
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引用次数: 0
High blocking voltage and low on-state voltage drop 4H-SiC p-channel IGBTs with optimized multizone floating field rings 具有优化的多区浮场环的4H-SiC p沟道igbt高阻塞电压和低导通电压降
IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-09-12 DOI: 10.1016/j.sse.2025.109248
Ruixue Mai , Xiaoli Tian , Xinyu Liu , Xinhua Wang , Yun Bai , Wei Wei , Yuhao Guo , Chengyue Yang , Chengzhan Li , Yidan Tang
A novel multizone floating field ring (M−FFR) edge termination structure with individually increasing ring spacing has been proposed, fabricated, and measured for 4H-silicon carbide (4H-SiC) p-channel insulated gate bipolar transistors (IGBTs). This M−FFR design effectively suppresses electric field crowding at the termination edge while maintaining a high tolerance to oxide charge accumulation. Numerical simulations indicate that the M−FFR achieves a 17.4 % higher blocking voltage compared to conventional equidistant floating field ring (Con-FFR) designs. Importantly, the proposed structure requires no complex fabrication steps or additional lithography processes, reducing manufacturing cost and complexity. To further enhance device performance, carrier lifetime enhancement techniques were applied to reduce the on-state voltage drop (Vf). Experimental measurements confirm that the fabricated p-channel SiC IGBTs are capable of sustaining blocking voltages exceeding 10 kV with leakage currents below 300nA. At a gate voltage of −20 V, a Vf of 5.77 V and a low differential specific on-resistance (Ron,sp,diff) of 17.5 mΩ·cm2 were achieved. These results suggest that the device is promising for applications in high-power electronic devices.
针对4h -碳化硅(4H-SiC) p沟道绝缘栅双极晶体管(igbt),提出、制作并测量了一种新的多区浮动场环(M−FFR)边缘端接结构。这种M−FFR设计有效地抑制了终端边缘的电场拥挤,同时保持了对氧化物电荷积累的高容忍度。数值模拟表明,与传统的等距浮动场环(Con-FFR)设计相比,M−FFR实现了17.4%的高阻断电压。重要的是,所提出的结构不需要复杂的制造步骤或额外的光刻工艺,降低了制造成本和复杂性。为了进一步提高器件性能,采用了载波寿命增强技术来降低导通电压降(Vf)。实验测量证实,制备的p沟道SiC igbt能够承受超过10 kV的阻塞电压,泄漏电流低于300nA。在−20 V的栅极电压下,获得了5.77 V的Vf和17.5 mΩ·cm2的低差分比导通电阻(Ron,sp,diff)。这些结果表明,该器件在大功率电子器件中具有广阔的应用前景。
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引用次数: 0
Layout effects on the thermal metrics of multichannel FinFETs 布局对多通道finfet热度量的影响
IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-09-12 DOI: 10.1016/j.sse.2025.109229
Lisa Tondelli , Andries J. Scholten , Thanh Viet Dinh , Luca Selmi
FinFET technology is widely used for advanced digital, RF, and analog applications due to its high performance and scalability. However, the non-planar architecture introduces increased electrical parasitics and self-heating effects (SHEs), which can degrade device reliability and performance.
We analyze, by simulation, the thermal behavior of four FinFET layouts designed with realistic process rules, focusing on transistor channels at the boundary of the large FinFET arrays required by RF applications. The findings highlight key thermal trade-offs of FinFET structures and suggest ways to balance static and dynamic self-heating for optimum performance and limited overtemperature.
由于其高性能和可扩展性,FinFET技术被广泛应用于先进的数字、射频和模拟应用。然而,非平面结构引入了增加的电寄生和自热效应(SHEs),这可能会降低器件的可靠性和性能。我们通过模拟分析了四种采用实际工艺规则设计的FinFET布局的热行为,重点关注射频应用所需的大型FinFET阵列边界的晶体管通道。研究结果强调了FinFET结构的关键热权衡,并提出了平衡静态和动态自热的方法,以获得最佳性能和限制过温。
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引用次数: 0
An understanding of fracture kinetics during the layer transfer of InP InP层间传递过程中断裂动力学的认识
IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-09-10 DOI: 10.1016/j.sse.2025.109240
K. Blanco , F. Mazen , T. Salvetat , D. Landru , F. Rieutord
The layer transfer of InP with the Smart Cut™ technology shows an original behavior, with the existence of a transition temperature, above which fracture occurs rapidly and below which it never spontaneously happens. Using microcracks observation and measurement of the amount of H2 inside cracks, we show that the existence of the two regimes is due to a competition between a trapping of implanted hydrogen inside the cracks and its out-diffusion into the bonded structure.
采用Smart Cut™技术的InP层间转移表现出原始行为,存在一个转变温度,高于该温度会迅速发生断裂,低于该温度则不会自发发生断裂。通过对微裂纹的观察和对裂纹内H2含量的测量,我们发现这两种状态的存在是由于在裂纹内注入的氢的捕获和向外扩散到键合结构之间的竞争。
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引用次数: 0
Extraction of trap densities in Al:HfO2 MIM capacitors using voltage ramp stress measurements 利用电压斜坡应力测量提取Al:HfO2 MIM电容器中的陷阱密度
IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-09-10 DOI: 10.1016/j.sse.2025.109239
Corinna Fohn , Emmanuel Chery , Kristof Croes , Michele Stucchi , Valeri Afanas’ev
We present an experimental method to directly evaluate the oxide trap densities in TiN/Al:HfO2/TiN capacitors from the low-field current hysteresis in voltage-ramp-stress (VRS) measurements. The extracted densities of deep electron traps are in the 1013 cm−2 range and virtually independent of the Al-doping concentration in HfO2 (ranging from 2% to 20%). These results indicate that the trapping sites are intrinsic and may be related to polaronic states in disordered HfO2. Regarding reproducibility and stability, the measurements were consistent across all samples, except for those with low Al doping, which exhibited increased leakage and degradation likely due to partial crystallization. In degraded samples, conductive paths formed after electrical stress confine the leakage, limiting the sensitivity of the method to local trap densities adjacent to the leakage path.
我们提出了一种实验方法,通过电压-斜坡-应力(VRS)测量中的低场电流滞后,直接评估TiN/Al:HfO2/TiN电容器中的氧化物阱密度。深电子阱的提取密度在1013 cm−2范围内,几乎与HfO2中al掺杂浓度(2% ~ 20%)无关。这些结果表明,捕获位点是本征的,可能与无序HfO2中的极化态有关。在再现性和稳定性方面,所有样品的测量结果都是一致的,除了那些低Al掺杂的样品,由于部分结晶可能导致泄漏和降解增加。在降解样品中,电应力后形成的导电路径限制了泄漏,限制了该方法对泄漏路径附近局部陷阱密度的灵敏度。
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引用次数: 0
Impact of bottom channel coverage ratio on electrical characteristics of GAA Si NS CFETs for Sub-1-nm nodes 底部通道覆盖率对亚1nm节点GAA Si NS cfet电特性的影响
IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-09-08 DOI: 10.1016/j.sse.2025.109244
Min-Hui Chuang , Sekhar Reddy Kola , Yiming Li
This study examines the impact of the bottom parasitic channel coverage ratio on the electrical characteristics of gate-all-around silicon nanosheet complementary FETs (GAA Si NS CFETs) optimized for sub-1-nm technology nodes. The coverage ratio, ranging from 60% to 100%, is analyzed in both n on p and p on n stacked configurations. Results reveal a strong inverse correlation between coverage ratio and bottom-device leakage current: devices with 60% coverage exhibit leakage currents up to 169× (p on n) and 140× (n on p) greater than those with full (100%) coverage. Additionally, the high-frequency behavior of a common-source amplifier shows that the cut-off frequency significantly improves in devices with a 100% bottom channel coverage ratio, highlighting the critical role of bottom-channel integrity in analog performance.
本研究考察了底部寄生通道覆盖率对栅极全硅纳米片互补场效应管(GAA Si NS cfet)电特性的影响,该互补场效应管优化用于亚1nm技术节点。在n on p和p on n堆叠两种配置下,分析了覆盖率,范围从60%到100%。结果显示,覆盖率与底部器件泄漏电流之间存在很强的负相关关系:60%覆盖率的器件的泄漏电流比完全(100%)覆盖率的器件的泄漏电流大169倍(p on n)和140倍(n on p)。此外,共源放大器的高频特性表明,在100%底通道覆盖率的设备中,截止频率显著提高,突出了底通道完整性在模拟性能中的关键作用。
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引用次数: 0
Flexible & light-weight III-V concentrated photovoltaics for automobile application 柔性和轻便的III-V型聚光光伏汽车应用
IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-09-06 DOI: 10.1016/j.sse.2025.109243
Sahil Sharma , Kumaran Selva , Carlos A. Favela , Bo Yu , Venkat Selvamanickam
Use of solar energy for electric power has a huge potential to reduce the carbon footprint caused by greenhouse gases (GHG). While photovoltaics (PV) has been adopted in mainstream terrestrial applications, their implementation in the automotive sector, to make PV-powered vehicles, has been minimal. The existing PV-powered vehicles utilize low-efficiency solar cells, which limits the driving range to 20 miles/day. In this work, we present concentrated photovoltaic (CPV) devices using high-efficiency III-V solar cells for automobile application to realize longer driving range. We have developed inexpensive and flexible III-V PV on metal tapes and integrated them with a durable, flexible PDMS microlens for light concentration. The integrated device showed more than 9 times improvement in current density and power output compared to a solar device without a light concentrator at 1 sun. Use an array of microlens integrated with III-V PV could extend the driving range to 115 miles/day for a vehicle with an electric mileage of 10 miles/kWh. We have also investigated the effect of the light incident angle on device performance to evaluate the optimal tilt angle while mounting the PV module on the vehicle’s roof.
利用太阳能发电在减少温室气体(GHG)造成的碳足迹方面具有巨大的潜力。虽然光伏(PV)已经在主流地面应用中被采用,但它们在汽车领域的实施,以制造光伏动力车辆,一直很少。现有的太阳能汽车使用低效率的太阳能电池,这限制了行驶里程20英里/天。在这项工作中,我们提出了用于汽车的聚光光伏(CPV)装置,该装置采用高效率的III-V太阳能电池,以实现更长的行驶里程。我们已经在金属带上开发了廉价且灵活的III-V光伏,并将它们与耐用,灵活的PDMS微透镜集成在一起,用于光集中。与没有光集中器的太阳能装置相比,集成装置在1个太阳下的电流密度和功率输出提高了9倍以上。使用与III-V型光伏集成的微透镜阵列可以将行驶里程延长到115英里/天,而电动里程为10英里/千瓦时。我们还研究了入射角对器件性能的影响,以评估将光伏组件安装在车顶时的最佳倾斜角度。
{"title":"Flexible & light-weight III-V concentrated photovoltaics for automobile application","authors":"Sahil Sharma ,&nbsp;Kumaran Selva ,&nbsp;Carlos A. Favela ,&nbsp;Bo Yu ,&nbsp;Venkat Selvamanickam","doi":"10.1016/j.sse.2025.109243","DOIUrl":"10.1016/j.sse.2025.109243","url":null,"abstract":"<div><div>Use of solar energy for electric power has a huge potential to reduce the carbon footprint caused by greenhouse gases (GHG). While photovoltaics (PV) has been adopted in mainstream terrestrial applications, their implementation in the automotive sector, to make PV-powered vehicles, has been minimal. The existing PV-powered vehicles utilize low-efficiency solar cells, which limits the driving range to 20 miles/day. In this work, we present concentrated photovoltaic (CPV) devices using high-efficiency III-V solar cells for automobile application to realize longer driving range. We have developed inexpensive and flexible III-V PV on metal tapes and integrated them with a durable, flexible PDMS microlens for light concentration. The integrated device showed more than 9 times improvement in current density and power output compared to a solar device without a light concentrator at 1 sun. Use an array of microlens integrated with III-V PV could extend the driving range to 115 miles/day for a vehicle with an electric mileage of 10 miles/kWh. We have also investigated the effect of the light incident angle on device performance to evaluate the optimal tilt angle while mounting the PV module on the vehicle’s roof.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109243"},"PeriodicalIF":1.4,"publicationDate":"2025-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145045988","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Silicon nanowire field-effect transistor biosensors with bowtie antenna 带领结天线的硅纳米线场效应晶体管生物传感器
IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-09-06 DOI: 10.1016/j.sse.2025.109230
Yongqiang Zhang , Kai Li , Nazarii Boichuk , Denys Pustovyi , Valeriia Chekubasheva , Hanlin Long , Mykhailo Petrychuk , Svetlana Vitusevich
In this study, we fabricated high-quality, liquid gate-all-around silicon nanowire (NW) field-effect transistor (FET) biosensors with a gold bowtie antenna using a silicon-on-insulator (SOI) wafer. The electrical and noise properties of these novel NW FETs were investigated under 940 nm light-emitting diode (LED) optical excitation in different solutions. A two-level signal (TLS) that is useful for biosensing was successfully activated at the light excitation only. The detection of repeatable fluctuations in current, manifested as minor peaks in the I–V curves under infrared illumination, confirms the activation of a TLS in the biosensors. The TLS demonstrates a linear dependence of its amplitude in relation to intensity. Moreover, we performed TLS studies in MgCl2 solutions of different concentrations. The results indicate that the FET devices incorporating a gold antenna have considerable potential for the excitation of TLS, thus allowing the sensitivity of the biosensors to be about 300 % enhanced.
在这项研究中,我们利用绝缘体上硅(SOI)晶圆制造了高质量的液态栅极全方位硅纳米线场效应晶体管(FET)生物传感器,该传感器具有金领结天线。在940 nm发光二极管(LED)光激发下,研究了新型NW场效应管在不同溶液下的电学和噪声特性。仅在光激发下就成功激活了用于生物传感的双电平信号(TLS)。在红外照射下,可重复检测到电流波动,表现为I-V曲线上的小峰,证实了生物传感器中TLS的激活。TLS的振幅与强度呈线性关系。此外,我们在不同浓度的MgCl2溶液中进行了TLS研究。结果表明,采用金天线的FET器件具有相当大的激发TLS的潜力,从而使生物传感器的灵敏度提高了约300%。
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引用次数: 0
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Solid-state Electronics
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