Pub Date : 2021-09-13DOI: 10.23919/empc53418.2021.9584948
Neeraj Yadav, L. Lorenzelli, F. Giacomozzi
Traditional planar microelectrode arrays (MEAs) have contributed significantly to broaden our knowledge on neuronal electrophysiological signaling by enabling simultaneous recording and stimulation of intracellular activities. However, planar MEAs are not suitable for investigating the electrophysiological behavior of complex 3D neuronal cultures. To exploit the potential of these 3D cultures, more advanced tools are needed which can assess the network-wide electrophysiological activity of neurons in 3D space. In this work, we propose a novel approach to develop a multi-level 3D microstructured array built on a well-established planer MEA setup. Initially, a planer MEA is realized using standard photolithography and physical vapor deposition (PVD) technique. During fabrication of the planer MEA, circuitry is added to connect the planar microelectrodes separately into individual groups. In addition to it, an electroplating process is utilized to grow gold micro-pillars on the planar electrode pads using a chemically amplified negative photoresist (KMPR 1050) from Kayaku Microchem as the mold. The circuitry allows independent control of the heights of the individual groups of 3D multi-level gold microelectrodes on the array. The mold is then stripped off. The microelectrodes can be insulated with Parylene-C and crowned with spherical gold beads using the ball bonding technique. The spherical gold beads could act as the interface between the device and the neuronal culture. The spherical shape of the bead would allow omnidirectional growth of neuronal networks, better mimicking the in vivo growth patterns. Experiment work to record and stimulate the electrophysiological activities of neuronal networks is ongoing. All fabrication techniques utilized in this approach are well established, allowing the fabricated devices to be reproducible, cost-effective, and scalable.
{"title":"A novel additive manufacturing approach towards fabrication of multi-level three-dimensional microelectrode array for electrophysiological investigations","authors":"Neeraj Yadav, L. Lorenzelli, F. Giacomozzi","doi":"10.23919/empc53418.2021.9584948","DOIUrl":"https://doi.org/10.23919/empc53418.2021.9584948","url":null,"abstract":"Traditional planar microelectrode arrays (MEAs) have contributed significantly to broaden our knowledge on neuronal electrophysiological signaling by enabling simultaneous recording and stimulation of intracellular activities. However, planar MEAs are not suitable for investigating the electrophysiological behavior of complex 3D neuronal cultures. To exploit the potential of these 3D cultures, more advanced tools are needed which can assess the network-wide electrophysiological activity of neurons in 3D space. In this work, we propose a novel approach to develop a multi-level 3D microstructured array built on a well-established planer MEA setup. Initially, a planer MEA is realized using standard photolithography and physical vapor deposition (PVD) technique. During fabrication of the planer MEA, circuitry is added to connect the planar microelectrodes separately into individual groups. In addition to it, an electroplating process is utilized to grow gold micro-pillars on the planar electrode pads using a chemically amplified negative photoresist (KMPR 1050) from Kayaku Microchem as the mold. The circuitry allows independent control of the heights of the individual groups of 3D multi-level gold microelectrodes on the array. The mold is then stripped off. The microelectrodes can be insulated with Parylene-C and crowned with spherical gold beads using the ball bonding technique. The spherical gold beads could act as the interface between the device and the neuronal culture. The spherical shape of the bead would allow omnidirectional growth of neuronal networks, better mimicking the in vivo growth patterns. Experiment work to record and stimulate the electrophysiological activities of neuronal networks is ongoing. All fabrication techniques utilized in this approach are well established, allowing the fabricated devices to be reproducible, cost-effective, and scalable.","PeriodicalId":348887,"journal":{"name":"2021 23rd European Microelectronics and Packaging Conference & Exhibition (EMPC)","volume":"52 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126074455","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-13DOI: 10.23919/empc53418.2021.9584983
T. Huesgen, V. Polezhaev, Ankit Sharma, Chunlei Liu, M. Montazerian, P. Stadler, N. Pavliček, G. Salvatore
PCB embedding in combination with direct-bonded copper (DBC) substrates is an attractive approach for packaging of power semiconductors facilitating low-inductive designs while relying on a proven insulating material. However, the CTE mismatch of these materials could cause reliability issues. This study presents an initial reliability screening using simple IGBT prepackages with alumina-based DBC as test vehicles. After -40/150 °C temperature cycles, fracture of the substrate and the chip is observed, resulting in an increased on-state resistance. Literature data suggest that the substrate failure is independent from the embedding. To gain a deeper understanding of the limitations of the technology, further research with optimized DBC substrates is required.
{"title":"Reliability Screening of a Hybrid DBC/PCB power semiconductor prepackage","authors":"T. Huesgen, V. Polezhaev, Ankit Sharma, Chunlei Liu, M. Montazerian, P. Stadler, N. Pavliček, G. Salvatore","doi":"10.23919/empc53418.2021.9584983","DOIUrl":"https://doi.org/10.23919/empc53418.2021.9584983","url":null,"abstract":"PCB embedding in combination with direct-bonded copper (DBC) substrates is an attractive approach for packaging of power semiconductors facilitating low-inductive designs while relying on a proven insulating material. However, the CTE mismatch of these materials could cause reliability issues. This study presents an initial reliability screening using simple IGBT prepackages with alumina-based DBC as test vehicles. After -40/150 °C temperature cycles, fracture of the substrate and the chip is observed, resulting in an increased on-state resistance. Literature data suggest that the substrate failure is independent from the embedding. To gain a deeper understanding of the limitations of the technology, further research with optimized DBC substrates is required.","PeriodicalId":348887,"journal":{"name":"2021 23rd European Microelectronics and Packaging Conference & Exhibition (EMPC)","volume":"104 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127988466","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-13DOI: 10.23919/empc53418.2021.9585011
K. Imenes, L. Blystad, L. Marchetti, Birgitte Honsvall, P. Øhlckers, Saad Rabbani, C. Moldovan, O. Ionescu, E. Franti, M. Dascalu, L. Dobrescu, D. Dobrescu, A. Barbilian, I. Lascar, A. Oproiu, T. Neagu, S. Raita, R. Costea, V. Carbunaru
This paper presents an ongoing development of an arm neuroprosthesis implantable interface consisting of a quadrupole implantable cuff-electrode, a neural analog front-end, a low power Arduino microcontroller, an off the shelf 433MHz transmitter, and a 3.7V 430mAh Li-Po battery. Implantable cuff electrode made of PDMS and Au has been successfully fabricated and tested for biocompatibility. A low power and low noise analog front-end were designed to filter and amplify the electroneurogram signal sensed by the cuff-electrode. The system was tested in the laboratory with input signals similar to the actual biological signals, verifying the correct operation of the implantable device. Finally, the analog front-end module was encapsulated in PDMS and implanted in the hind limb of a swine giving valuable training and knowledge for further development of the neuroprosthesis implantable interface.
{"title":"Implantable Interface for an Arm Neuroprosthesis","authors":"K. Imenes, L. Blystad, L. Marchetti, Birgitte Honsvall, P. Øhlckers, Saad Rabbani, C. Moldovan, O. Ionescu, E. Franti, M. Dascalu, L. Dobrescu, D. Dobrescu, A. Barbilian, I. Lascar, A. Oproiu, T. Neagu, S. Raita, R. Costea, V. Carbunaru","doi":"10.23919/empc53418.2021.9585011","DOIUrl":"https://doi.org/10.23919/empc53418.2021.9585011","url":null,"abstract":"This paper presents an ongoing development of an arm neuroprosthesis implantable interface consisting of a quadrupole implantable cuff-electrode, a neural analog front-end, a low power Arduino microcontroller, an off the shelf 433MHz transmitter, and a 3.7V 430mAh Li-Po battery. Implantable cuff electrode made of PDMS and Au has been successfully fabricated and tested for biocompatibility. A low power and low noise analog front-end were designed to filter and amplify the electroneurogram signal sensed by the cuff-electrode. The system was tested in the laboratory with input signals similar to the actual biological signals, verifying the correct operation of the implantable device. Finally, the analog front-end module was encapsulated in PDMS and implanted in the hind limb of a swine giving valuable training and knowledge for further development of the neuroprosthesis implantable interface.","PeriodicalId":348887,"journal":{"name":"2021 23rd European Microelectronics and Packaging Conference & Exhibition (EMPC)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129022181","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-13DOI: 10.23919/empc53418.2021.9584973
S. L. Kuziora, Hoang-Vu Nguyen, K. Aasmundtveit
Ni–Sn solid-liquid interdiffusion bonding (SLID) has shown potential for assembly of materials in high-temperature applications up to $600^{circ}mathrm{C}$. This paper attempts to fabricate a bond with a specific intermetallic phase of Ni$_{3} Sn_{2}$ to push the temperature stability to $1000^{circ}mathrm{C}$. Experiments were conducted using Si/TiW(10:90)/Ni/Sn dies where a two-step bonding process was used. The first step was bonding at $285^{circ}mathrm{C}$ for 5 hours. The bonded dies showed fractures perpendicular to the bonding plane indicating significant thermomechanical tensile forces. The initial voiding was 5% less than theoretically expected. The second step was annealing at $600^{circ}mathrm{C}$ for 1 hour and 3 hours, resulting in the final bonds with a layered structure of $Ni/Ni_{3} Sn/Ni_{3} Sn_{2} /Ni_{3} Sn_{4} /Ni_{3} Sn_{2} /Ni_{3}$ Sn/Ni. The bonds after 3 hours annealing had no remaining Ni. New fractures along the bonding plane appeared propagating through the remaining Ni$_{3} Sn_{4}$ indicating large thermomechanical shearing forces. Voiding increased by a further 6% after the 1 hour anneal. For the bonds with 1 hour anneal, the new voids were seen at the Ni$_{3} Sn_{4}$ /Ni$_{3} Sn_{2}$ interface and at the Ni3 Sn/Ni interface. The growth constant for Ni$_{3} Sn_{2}$ at $600^{circ}mathrm{C}$ was 3.5$mu m/min^{n}$, while the growth exponent was 0.2 giving a homogenization time of $sim 60$ hours for the experimental bondline thickness of 38$mu$m. Thus, larger annealing temperatures or times are needed to accelerate bonding.
Ni-Sn固液互扩散键合(slide)已经显示出在高达$600^{circ}mathrm{C}$的高温应用中组装材料的潜力。本文试图制造一种与特定镍金属间相$_{3} Sn_{2}$的键，将温度稳定性推至$1000^{circ}mathrm{C}$。实验采用Si/TiW(10:90)/Ni/Sn两步键合工艺。第一步是在$285^{circ}mathrm{C}$粘接5小时。粘接模具呈现垂直于粘接平面的断裂，表明存在显著的热力学拉伸力。初次排尿5次% less than theoretically expected. The second step was annealing at $600^{circ}mathrm{C}$ for 1 hour and 3 hours, resulting in the final bonds with a layered structure of $Ni/Ni_{3} Sn/Ni_{3} Sn_{2} /Ni_{3} Sn_{4} /Ni_{3} Sn_{2} /Ni_{3}$ Sn/Ni. The bonds after 3 hours annealing had no remaining Ni. New fractures along the bonding plane appeared propagating through the remaining Ni$_{3} Sn_{4}$ indicating large thermomechanical shearing forces. Voiding increased by a further 6% after the 1 hour anneal. For the bonds with 1 hour anneal, the new voids were seen at the Ni$_{3} Sn_{4}$ /Ni$_{3} Sn_{2}$ interface and at the Ni3 Sn/Ni interface. The growth constant for Ni$_{3} Sn_{2}$ at $600^{circ}mathrm{C}$ was 3.5$mu m/min^{n}$, while the growth exponent was 0.2 giving a homogenization time of $sim 60$ hours for the experimental bondline thickness of 38$mu$m. Thus, larger annealing temperatures or times are needed to accelerate bonding.
{"title":"Ni–Sn SLID bonds for assembly at extremely high temperatures","authors":"S. L. Kuziora, Hoang-Vu Nguyen, K. Aasmundtveit","doi":"10.23919/empc53418.2021.9584973","DOIUrl":"https://doi.org/10.23919/empc53418.2021.9584973","url":null,"abstract":"Ni–Sn solid-liquid interdiffusion bonding (SLID) has shown potential for assembly of materials in high-temperature applications up to $600^{circ}mathrm{C}$. This paper attempts to fabricate a bond with a specific intermetallic phase of Ni$_{3} Sn_{2}$ to push the temperature stability to $1000^{circ}mathrm{C}$. Experiments were conducted using Si/TiW(10:90)/Ni/Sn dies where a two-step bonding process was used. The first step was bonding at $285^{circ}mathrm{C}$ for 5 hours. The bonded dies showed fractures perpendicular to the bonding plane indicating significant thermomechanical tensile forces. The initial voiding was 5% less than theoretically expected. The second step was annealing at $600^{circ}mathrm{C}$ for 1 hour and 3 hours, resulting in the final bonds with a layered structure of $Ni/Ni_{3} Sn/Ni_{3} Sn_{2} /Ni_{3} Sn_{4} /Ni_{3} Sn_{2} /Ni_{3}$ Sn/Ni. The bonds after 3 hours annealing had no remaining Ni. New fractures along the bonding plane appeared propagating through the remaining Ni$_{3} Sn_{4}$ indicating large thermomechanical shearing forces. Voiding increased by a further 6% after the 1 hour anneal. For the bonds with 1 hour anneal, the new voids were seen at the Ni$_{3} Sn_{4}$ /Ni$_{3} Sn_{2}$ interface and at the Ni3 Sn/Ni interface. The growth constant for Ni$_{3} Sn_{2}$ at $600^{circ}mathrm{C}$ was 3.5$mu m/min^{n}$, while the growth exponent was 0.2 giving a homogenization time of $sim 60$ hours for the experimental bondline thickness of 38$mu$m. Thus, larger annealing temperatures or times are needed to accelerate bonding.","PeriodicalId":348887,"journal":{"name":"2021 23rd European Microelectronics and Packaging Conference & Exhibition (EMPC)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128829198","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-13DOI: 10.23919/empc53418.2021.9584951
Yan Zhang, Huihui Wang, Pei Lu, Fengdie Hu, Minxi Du, Xuan Zhang, Johan Liu
Low-dimensional materials such as graphene exhibit superior electrical, mechanical and thermal properties. However, structural defects occur during the growth or treatment process of carbon nanomaterial and greatly affect the material properties. In this paper, molecular dynamics simulation methods are used to study the effects of atomic defects in graphene sheets on the tensile strength, and the vacancy type and defect orientation are considered in the cases of graphene sheets under various mechanical loadings. The simulation results show that for the graphene sheets with structural defects, the fracture starts near the original vacancy position. The tensile strength of the graphene sheets with X1-type vacancy defects under zigzag direction is reduced by about 26.9% compared with that of the defect-free graphene sheet, while the graphene sheet with X2-type vacancy defects shows the least decrease in magnitude, which is 9.5% lower than that of the perfect graphene sheet. When stretched in the armchair direction, the tensile strength of the graphene sheet with H2 vacancy defects was greatly reduced by 27.1%, and the X1 vacancy defects shows the least influence, where tensile strength of the graphene sheets was reduced by 11.2%.
{"title":"MDS study on tensile properties of defective graphene sheet","authors":"Yan Zhang, Huihui Wang, Pei Lu, Fengdie Hu, Minxi Du, Xuan Zhang, Johan Liu","doi":"10.23919/empc53418.2021.9584951","DOIUrl":"https://doi.org/10.23919/empc53418.2021.9584951","url":null,"abstract":"Low-dimensional materials such as graphene exhibit superior electrical, mechanical and thermal properties. However, structural defects occur during the growth or treatment process of carbon nanomaterial and greatly affect the material properties. In this paper, molecular dynamics simulation methods are used to study the effects of atomic defects in graphene sheets on the tensile strength, and the vacancy type and defect orientation are considered in the cases of graphene sheets under various mechanical loadings. The simulation results show that for the graphene sheets with structural defects, the fracture starts near the original vacancy position. The tensile strength of the graphene sheets with X1-type vacancy defects under zigzag direction is reduced by about 26.9% compared with that of the defect-free graphene sheet, while the graphene sheet with X2-type vacancy defects shows the least decrease in magnitude, which is 9.5% lower than that of the perfect graphene sheet. When stretched in the armchair direction, the tensile strength of the graphene sheet with H2 vacancy defects was greatly reduced by 27.1%, and the X1 vacancy defects shows the least influence, where tensile strength of the graphene sheets was reduced by 11.2%.","PeriodicalId":348887,"journal":{"name":"2021 23rd European Microelectronics and Packaging Conference & Exhibition (EMPC)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130682613","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-13DOI: 10.23919/empc53418.2021.9584976
T. Jonsson, C. Svensson, L. Drugge, Ghayathri Suriyamoorthy
A high current, low voltage, single sided MOSFET device has been designed and experimentally verified. The device is based on a die fabricated in standard CMOS and a special package based on PCB technique fabricated in a standard PCB process. The transistor, its special package and its mounting on a mother board are carefully analyzed through simulation. The experimental verification indicates an on-resistance less than 0.5mohm, corresponding to a specific on-resistance of 6.7mohm-mm2.
{"title":"High current transistor packaging for very low on-resistance","authors":"T. Jonsson, C. Svensson, L. Drugge, Ghayathri Suriyamoorthy","doi":"10.23919/empc53418.2021.9584976","DOIUrl":"https://doi.org/10.23919/empc53418.2021.9584976","url":null,"abstract":"A high current, low voltage, single sided MOSFET device has been designed and experimentally verified. The device is based on a die fabricated in standard CMOS and a special package based on PCB technique fabricated in a standard PCB process. The transistor, its special package and its mounting on a mother board are carefully analyzed through simulation. The experimental verification indicates an on-resistance less than 0.5mohm, corresponding to a specific on-resistance of 6.7mohm-mm2.","PeriodicalId":348887,"journal":{"name":"2021 23rd European Microelectronics and Packaging Conference & Exhibition (EMPC)","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122815109","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-13DOI: 10.23919/empc53418.2021.9585008
Si-zhen Guo, Jin Chen, Yuanyuan Wang, Shujin Chen, Maomao Zhang, Johan Liu
Graphene attracts great attention due to its excellent properties. However, the mechanical of assembled graphene-based film is usually inferior than its inherent mechanical properties. Herein, we construct a high-performance graphene-based film via vacuum filtration process by using graphene as matrix and hydroxylated Carbon Nanotube (CNT) as reinforcement agent. The synergistic interaction of hydrogen bonds between CNT and graphene Oxide (GO) and ionic bonds between Fe2+ on CNT and GO significantly improve the mechanical properties of free-standing and flexible rGO/CNT film. Scanning Electron Microscopic (SEM) imaging and stress transfer mechanism analysis show that the introduction of CNT can hinder the slippage of GO sheets and promote the stress transfer under the continuous loading. The obtained rGO/CNT film shows high toughness of 3 MJ/m3, which is 3.6 times higher than that of GO sheets. This facile and scalable strategy can pave the way for the fabrication of high-performance graphene-based film in various applications.
{"title":"Synergistic Toughening of Graphene Films by Addition of Hydroxylated Carbon Nanotube","authors":"Si-zhen Guo, Jin Chen, Yuanyuan Wang, Shujin Chen, Maomao Zhang, Johan Liu","doi":"10.23919/empc53418.2021.9585008","DOIUrl":"https://doi.org/10.23919/empc53418.2021.9585008","url":null,"abstract":"Graphene attracts great attention due to its excellent properties. However, the mechanical of assembled graphene-based film is usually inferior than its inherent mechanical properties. Herein, we construct a high-performance graphene-based film via vacuum filtration process by using graphene as matrix and hydroxylated Carbon Nanotube (CNT) as reinforcement agent. The synergistic interaction of hydrogen bonds between CNT and graphene Oxide (GO) and ionic bonds between Fe2+ on CNT and GO significantly improve the mechanical properties of free-standing and flexible rGO/CNT film. Scanning Electron Microscopic (SEM) imaging and stress transfer mechanism analysis show that the introduction of CNT can hinder the slippage of GO sheets and promote the stress transfer under the continuous loading. The obtained rGO/CNT film shows high toughness of 3 MJ/m3, which is 3.6 times higher than that of GO sheets. This facile and scalable strategy can pave the way for the fabrication of high-performance graphene-based film in various applications.","PeriodicalId":348887,"journal":{"name":"2021 23rd European Microelectronics and Packaging Conference & Exhibition (EMPC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129398780","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-13DOI: 10.23919/empc53418.2021.9584957
A. Vakili, Daniel Bassetti, M. Bregoli, A. Lamagna, D. Mascali, V. Bellini, F. Ficorella, O. H. Ali, Mario Buffardo, Daniele Finocchi, S. Francola, C. Cianci
The selection of the best Light Emitting Diode (LED) technologies for space application is a challenging issue, requiring a trade-off of several aspects starting from the intrinsic properties of the die. Starting from a previous evaluation of the LEDs for optocouplers by the team, the effects of proton-induced radiation damage on several types of more modern LEDs fabricated by different manufacturers and technologies are discussed in this paper. The test results have been validated by the supervising entity, according to their needs. The adopted methodology contemplated more than 150 devices, belonging to several technological options under comparison, irradiated unbiased. Electrical and electro-optical parameters were measured and analyzed by using dedicated advanced facilities and finally, the differences in output optical power emission and spectral emission and the degradation rate of the device families under comparison have been studied. Statistical analysis was performed, using a one-sided tolerance method for hardness assurance, on the LEDs’ optical power emission and spectral emission data in which the effects of different bias currents and particle fluences were investigated. Non-Ionizing Energy Loss model of the light sources was also applied in order to qualify the results. Finally, the comparative analysis clearly showed that one specific device family, i.e. R type, was the most efficient even after proton damage, with an outstanding performance if compared to all the others, and second best in relative terms, with N type was the one with the most reduced degradation dynamics. The comparative analysis allowed the device selection for the subsequent project phase, taking the obtained results into account.
{"title":"Light Emitting Diodes selection for space applications based on the analysis of proton-induced damage","authors":"A. Vakili, Daniel Bassetti, M. Bregoli, A. Lamagna, D. Mascali, V. Bellini, F. Ficorella, O. H. Ali, Mario Buffardo, Daniele Finocchi, S. Francola, C. Cianci","doi":"10.23919/empc53418.2021.9584957","DOIUrl":"https://doi.org/10.23919/empc53418.2021.9584957","url":null,"abstract":"The selection of the best Light Emitting Diode (LED) technologies for space application is a challenging issue, requiring a trade-off of several aspects starting from the intrinsic properties of the die. Starting from a previous evaluation of the LEDs for optocouplers by the team, the effects of proton-induced radiation damage on several types of more modern LEDs fabricated by different manufacturers and technologies are discussed in this paper. The test results have been validated by the supervising entity, according to their needs. The adopted methodology contemplated more than 150 devices, belonging to several technological options under comparison, irradiated unbiased. Electrical and electro-optical parameters were measured and analyzed by using dedicated advanced facilities and finally, the differences in output optical power emission and spectral emission and the degradation rate of the device families under comparison have been studied. Statistical analysis was performed, using a one-sided tolerance method for hardness assurance, on the LEDs’ optical power emission and spectral emission data in which the effects of different bias currents and particle fluences were investigated. Non-Ionizing Energy Loss model of the light sources was also applied in order to qualify the results. Finally, the comparative analysis clearly showed that one specific device family, i.e. R type, was the most efficient even after proton damage, with an outstanding performance if compared to all the others, and second best in relative terms, with N type was the one with the most reduced degradation dynamics. The comparative analysis allowed the device selection for the subsequent project phase, taking the obtained results into account.","PeriodicalId":348887,"journal":{"name":"2021 23rd European Microelectronics and Packaging Conference & Exhibition (EMPC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124256341","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-13DOI: 10.23919/empc53418.2021.9584946
Mona Bakr, Yibo Su, A. Rezaei, F. Bossuyt, J. Vanfleteren
In many applications, including automotive, wearables, and health sectors, the over-molding of flexible electronics structures into plastics has been commonly used. A polyimide-copper (PI/Cu) electronic circuit embedded in a thermoplastic material using an injection molding process is the basis of this work. The electronic circuit is a PI substrate consisting of copper interconnections where lead-free solder and under-fill material are used to assemble the electronic components. In previous work, the integration of electronics using a mold with a two-dimensional (2D) flat shape and the optimization of materials, including the over-molding material and the type of PI/Cu foil used, were studied. In this study, a 2D curved mold with an arc length curvature of 205 mm is used to investigate its effect on the resistance of 0-ohm resistors. The circuit design and the component mounting place are considered to be the parameters in this study. Moreover, the data obtained before and after over-molding from the measurements of the assembled resistors showed the effect of the over-molding on the electronics in the curved mold.
{"title":"Over-molding of two-dimensional curved shape using polyimide copper cladding foil","authors":"Mona Bakr, Yibo Su, A. Rezaei, F. Bossuyt, J. Vanfleteren","doi":"10.23919/empc53418.2021.9584946","DOIUrl":"https://doi.org/10.23919/empc53418.2021.9584946","url":null,"abstract":"In many applications, including automotive, wearables, and health sectors, the over-molding of flexible electronics structures into plastics has been commonly used. A polyimide-copper (PI/Cu) electronic circuit embedded in a thermoplastic material using an injection molding process is the basis of this work. The electronic circuit is a PI substrate consisting of copper interconnections where lead-free solder and under-fill material are used to assemble the electronic components. In previous work, the integration of electronics using a mold with a two-dimensional (2D) flat shape and the optimization of materials, including the over-molding material and the type of PI/Cu foil used, were studied. In this study, a 2D curved mold with an arc length curvature of 205 mm is used to investigate its effect on the resistance of 0-ohm resistors. The circuit design and the component mounting place are considered to be the parameters in this study. Moreover, the data obtained before and after over-molding from the measurements of the assembled resistors showed the effect of the over-molding on the electronics in the curved mold.","PeriodicalId":348887,"journal":{"name":"2021 23rd European Microelectronics and Packaging Conference & Exhibition (EMPC)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125034056","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-13DOI: 10.23919/empc53418.2021.9584969
Camilla Kärnfelt, Maina Sinou
The shrinkage of Low Temperature Co-fired Ceramics (LTCC) during firing is one of the most difficult features to control in LTCC fabrication, as many factors may impact on the result. The shrinkage given by the tape manufacturer is not perfectly transposable to a production environment where preparation, use and equipment is not in exact accordance. Thus, predictable shrinkage models are of main importance in order to fabricate LTCC devices according to specifications. The objective of this work is to develop such models for the Ferro L8 tape using the powerful Design of Experiments (DOE) technique. Four factors are varied; the stack thickness, the device surface, the applied pressure and the temperature during lamination. Other factors such as operator, lamination time or firing profile are kept to a fixed value during these experiments. The result variables are lamination quality and x, y and z-direction shrinkage. Lamination quality is found to be mainly impacted by the interaction between the stack thickness and the surface area of the stack, while for the z-direction shrinkage this interaction together with lamination temperature are significant factors and finally for the lateral shrinkage the main effects stack thickness, surface area and temperature are significant. Numerical models for shrinkage in z- and lateral directions are established. This work enforces the understanding of the shrinkage of LTCC and permits for the Ferro L8 users correctly compensate the layout for shrinkage.
{"title":"Control of Low Temperature Co-fired Ceramic Shrinkage for Unconstrained Sintering","authors":"Camilla Kärnfelt, Maina Sinou","doi":"10.23919/empc53418.2021.9584969","DOIUrl":"https://doi.org/10.23919/empc53418.2021.9584969","url":null,"abstract":"The shrinkage of Low Temperature Co-fired Ceramics (LTCC) during firing is one of the most difficult features to control in LTCC fabrication, as many factors may impact on the result. The shrinkage given by the tape manufacturer is not perfectly transposable to a production environment where preparation, use and equipment is not in exact accordance. Thus, predictable shrinkage models are of main importance in order to fabricate LTCC devices according to specifications. The objective of this work is to develop such models for the Ferro L8 tape using the powerful Design of Experiments (DOE) technique. Four factors are varied; the stack thickness, the device surface, the applied pressure and the temperature during lamination. Other factors such as operator, lamination time or firing profile are kept to a fixed value during these experiments. The result variables are lamination quality and x, y and z-direction shrinkage. Lamination quality is found to be mainly impacted by the interaction between the stack thickness and the surface area of the stack, while for the z-direction shrinkage this interaction together with lamination temperature are significant factors and finally for the lateral shrinkage the main effects stack thickness, surface area and temperature are significant. Numerical models for shrinkage in z- and lateral directions are established. This work enforces the understanding of the shrinkage of LTCC and permits for the Ferro L8 users correctly compensate the layout for shrinkage.","PeriodicalId":348887,"journal":{"name":"2021 23rd European Microelectronics and Packaging Conference & Exhibition (EMPC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129470613","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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