Pub Date : 2014-10-30DOI: 10.1109/IIT.2014.6940039
B. Chang, S. Kondratenko, P. K. Hsu, D. Kuo
The unique dual axis tilt design of the gyro-super-disk (GSD) series end stations, as shown in figure 1, allow rapid adjustment of wafer tilt and twist angles and provide high throughput for multi-angle implantations. The treadmill of device scaling has been pushing for tighter process control in all sectors, including implant angle accuracy. Recently, there are rising demands for it to be tightened to <; ±0.2°. The focus of this study is on high energy implantation with the beam angle normal (perpendicular) to the silicon wafer surface, corresponding to major axial crystal channeling. The obtained process results indicate high sensitivity in both device electrical performance and thermal-wave response to the angle variation even when it is within the original system specification of <; ±0.5°. An implant beam angle control (BAC) kit was developed and tested to address the need of more accurate implant angle setup. The BAC kit includes a 2-dimentional beam angle measuring mask mounted on the implant disk, and an add-on software function to control the end station to the desired implant angle with improved accuracy, which is determined from the beam angle measuring mask. Once the beam angle measurement is performed after beam setup, but prior to wafer implant, the true implant angle will be obtained by moving the end-station disk to position. In this study, the BAC kit has been demonstrated with achieved angle accuracy of <; ±0.15° after the angle variation from the beam setup is measured and compensated.
{"title":"Beam angle control kit for angle sensitive implantation","authors":"B. Chang, S. Kondratenko, P. K. Hsu, D. Kuo","doi":"10.1109/IIT.2014.6940039","DOIUrl":"https://doi.org/10.1109/IIT.2014.6940039","url":null,"abstract":"The unique dual axis tilt design of the gyro-super-disk (GSD) series end stations, as shown in figure 1, allow rapid adjustment of wafer tilt and twist angles and provide high throughput for multi-angle implantations. The treadmill of device scaling has been pushing for tighter process control in all sectors, including implant angle accuracy. Recently, there are rising demands for it to be tightened to <; ±0.2°. The focus of this study is on high energy implantation with the beam angle normal (perpendicular) to the silicon wafer surface, corresponding to major axial crystal channeling. The obtained process results indicate high sensitivity in both device electrical performance and thermal-wave response to the angle variation even when it is within the original system specification of <; ±0.5°. An implant beam angle control (BAC) kit was developed and tested to address the need of more accurate implant angle setup. The BAC kit includes a 2-dimentional beam angle measuring mask mounted on the implant disk, and an add-on software function to control the end station to the desired implant angle with improved accuracy, which is determined from the beam angle measuring mask. Once the beam angle measurement is performed after beam setup, but prior to wafer implant, the true implant angle will be obtained by moving the end-station disk to position. In this study, the BAC kit has been demonstrated with achieved angle accuracy of <; ±0.15° after the angle variation from the beam setup is measured and compensated.","PeriodicalId":6548,"journal":{"name":"2014 20th International Conference on Ion Implantation Technology (IIT)","volume":"40 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77222610","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-30DOI: 10.1109/IIT.2014.6939985
Ying Tang, O. Byl, Young-Ha Yoon, S. Yedave, Biing-Tsair Tien, S. Bishop, J. Sweeney, Shin-Woo Kang, J. J. Kang
In recent years, a major challenge facing beamline implant tools is the low productivity of high dose p-type boron doping. A significant aspect of this challenge is the limited ion source life obtained when running boron trifluoride (BF3), the primary feed gas for boron doping. Use of BF3 often results in redistribution of tungsten within the arc chamber and source area due to the halogen cycle. Presented here are results of experiments using a mixture of boron trifluoride and hydrogen (BF3/H2) as an alternative to BF3. Tests were performed on the Entegris® source test stand as well as on high current ion implant tools in high volume manufacturing environments. The BF3/H2 mixture demonstrated distinct productivity advantages, such as significant improvements in source life, with minimal change in beam current and other process parameters. Additionally the stability of the mixture and reliability of the package were evaluated to ensure quality and safety of this new material for semiconductor manufacturing.
{"title":"Ion implanter performance improvement for boron doping by using boron trifluoride (BF3) and hydrogen (H2) mixture gases","authors":"Ying Tang, O. Byl, Young-Ha Yoon, S. Yedave, Biing-Tsair Tien, S. Bishop, J. Sweeney, Shin-Woo Kang, J. J. Kang","doi":"10.1109/IIT.2014.6939985","DOIUrl":"https://doi.org/10.1109/IIT.2014.6939985","url":null,"abstract":"In recent years, a major challenge facing beamline implant tools is the low productivity of high dose p-type boron doping. A significant aspect of this challenge is the limited ion source life obtained when running boron trifluoride (BF3), the primary feed gas for boron doping. Use of BF3 often results in redistribution of tungsten within the arc chamber and source area due to the halogen cycle. Presented here are results of experiments using a mixture of boron trifluoride and hydrogen (BF3/H2) as an alternative to BF3. Tests were performed on the Entegris® source test stand as well as on high current ion implant tools in high volume manufacturing environments. The BF3/H2 mixture demonstrated distinct productivity advantages, such as significant improvements in source life, with minimal change in beam current and other process parameters. Additionally the stability of the mixture and reliability of the package were evaluated to ensure quality and safety of this new material for semiconductor manufacturing.","PeriodicalId":6548,"journal":{"name":"2014 20th International Conference on Ion Implantation Technology (IIT)","volume":"118 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80311076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-30DOI: 10.1109/IIT.2014.6940037
F. Sinclair, J. Olson, D. Rodier, Alex Eidukonis, T. Thanigaivelan, S. Todorov
The continued advance of semiconductor technology, including the emergence of 3D device architectures, demands ever-increasing precision of dose and angle control in ion implantation. The Varian Semiconductor Equipment business unit of Applied Materials has enhanced the design of the industry's leading medium current implanter to meet the production requirements of advanced technology nodes. Improvements to the implanter architecture include more precise angle control, increased beam utilization, better uniformity and repeatability and longer maintenance intervals. Advanced ion optics allow measurement and control of beam shape.
{"title":"VIISta 900 3D: Advanced medium current implanter","authors":"F. Sinclair, J. Olson, D. Rodier, Alex Eidukonis, T. Thanigaivelan, S. Todorov","doi":"10.1109/IIT.2014.6940037","DOIUrl":"https://doi.org/10.1109/IIT.2014.6940037","url":null,"abstract":"The continued advance of semiconductor technology, including the emergence of 3D device architectures, demands ever-increasing precision of dose and angle control in ion implantation. The Varian Semiconductor Equipment business unit of Applied Materials has enhanced the design of the industry's leading medium current implanter to meet the production requirements of advanced technology nodes. Improvements to the implanter architecture include more precise angle control, increased beam utilization, better uniformity and repeatability and longer maintenance intervals. Advanced ion optics allow measurement and control of beam shape.","PeriodicalId":6548,"journal":{"name":"2014 20th International Conference on Ion Implantation Technology (IIT)","volume":"9 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85416096","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-30DOI: 10.1109/IIT.2014.6940024
Takeshi Matsumoto, Masatoshi Onoda, Kohichi Orihira, J. Tatemichi, E. Guiot, Olivier Petit, Thibaut Courrenq
We have developed an ultra-high current ion implantation system for high throughput wafer processing. The ion source is designed based on implanters used in the flat panel display industry to produce 80 cm high beams which exceed 80 mA. Multiple wafers are processed at a time with the large-sized beam. The implantation tool exhibited throughput of 107 and 38 wafers per hour for 1E16 and 1E17 ions/cm2, respectively. Successful InP layer transfer with smooth surface was demonstrated using Smart Cut™ technology.
{"title":"High throughput ion implanter for environmentally beneficial products with III–V compound semiconductor","authors":"Takeshi Matsumoto, Masatoshi Onoda, Kohichi Orihira, J. Tatemichi, E. Guiot, Olivier Petit, Thibaut Courrenq","doi":"10.1109/IIT.2014.6940024","DOIUrl":"https://doi.org/10.1109/IIT.2014.6940024","url":null,"abstract":"We have developed an ultra-high current ion implantation system for high throughput wafer processing. The ion source is designed based on implanters used in the flat panel display industry to produce 80 cm high beams which exceed 80 mA. Multiple wafers are processed at a time with the large-sized beam. The implantation tool exhibited throughput of 107 and 38 wafers per hour for 1E16 and 1E17 ions/cm2, respectively. Successful InP layer transfer with smooth surface was demonstrated using Smart Cut™ technology.","PeriodicalId":6548,"journal":{"name":"2014 20th International Conference on Ion Implantation Technology (IIT)","volume":"3 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90162969","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-30DOI: 10.1109/IIT.2014.6939982
N. Sakudo, N. Ikenaga, N. Sakumoto, K. Matsui, Y. Kishi, Z. Yajima
It has been difficult to sputter-deposit crystalline compound directly on a substrate of low heat-resistant material like polymer. In this study a new apparatus is developed which deposits metallic compound film in crystalline structure directly on a substrate at lower temperature than 200°C (473K). The apparatus consists of a magnetron-sputtering deposition system with multi targets as well as of an ion irradiation system which has the same constitution as the plasma-based ion implantation, although the applied voltage is much lower. The crystallization on a low temperature substrate is assumed to arise from the simultaneous irradiation of ions extracted from plasma. In this report very low temperature crystallization of titanium nickel on polyimide substrate at 80°C (353K) was achieved by reducing the substrate heating due to the ion irradiation. The shape memory effect of the sheet was confirmed.
{"title":"Crystallizing metal compound film on plastics by plasma-based ion implantation","authors":"N. Sakudo, N. Ikenaga, N. Sakumoto, K. Matsui, Y. Kishi, Z. Yajima","doi":"10.1109/IIT.2014.6939982","DOIUrl":"https://doi.org/10.1109/IIT.2014.6939982","url":null,"abstract":"It has been difficult to sputter-deposit crystalline compound directly on a substrate of low heat-resistant material like polymer. In this study a new apparatus is developed which deposits metallic compound film in crystalline structure directly on a substrate at lower temperature than 200°C (473K). The apparatus consists of a magnetron-sputtering deposition system with multi targets as well as of an ion irradiation system which has the same constitution as the plasma-based ion implantation, although the applied voltage is much lower. The crystallization on a low temperature substrate is assumed to arise from the simultaneous irradiation of ions extracted from plasma. In this report very low temperature crystallization of titanium nickel on polyimide substrate at 80°C (353K) was achieved by reducing the substrate heating due to the ion irradiation. The shape memory effect of the sheet was confirmed.","PeriodicalId":6548,"journal":{"name":"2014 20th International Conference on Ion Implantation Technology (IIT)","volume":"1 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76918410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-30DOI: 10.1109/IIT.2014.6940060
J. Krugener, E. Bugiel, H. Osten, R. Peibst, F. Kiefer, T. Ohrdes, R. Brendel
Ion implantation of boron is a promising technique for the preparation of p-type emitters in n-type solar cells, e.g. for passivated emitter and rear, totally doped (PERT) cells. Although fully ion-implanted high efficiency solar cells have been reported recently, annealing of crystal defects resulting from B implantation is still challenging. We present structural investigations of implant-induced crystal defects after ion implantation of B on randomly textured Si(100) and subsequent annealing. We find that the resulting defect distribution after annealing for 20 min at 900 °C is strongly affected by the surface morphology. Ion implantation of 2·1015 cm□2 B through a 20 nm thick, thermally grown screening oxide on a sample tilted by 6 ° towards <;100> results in 3 different local defect densities: (i) for those sides of the pyramids which are tilted into the ion beam, (ii) for those sides which are tilted out of the beam and (iii) for the valleys in between the pyramids. This difference in defect density is mirrored by the effective local ion doses as obtained from process simulations. After annealing for 20 min at 1050 °C defects are observed only within the valleys of the texture.
{"title":"Structural investigation of ion implantation of boron on random pyramid textured Si(100) for photovoltaic applications","authors":"J. Krugener, E. Bugiel, H. Osten, R. Peibst, F. Kiefer, T. Ohrdes, R. Brendel","doi":"10.1109/IIT.2014.6940060","DOIUrl":"https://doi.org/10.1109/IIT.2014.6940060","url":null,"abstract":"Ion implantation of boron is a promising technique for the preparation of p-type emitters in n-type solar cells, e.g. for passivated emitter and rear, totally doped (PERT) cells. Although fully ion-implanted high efficiency solar cells have been reported recently, annealing of crystal defects resulting from B implantation is still challenging. We present structural investigations of implant-induced crystal defects after ion implantation of B on randomly textured Si(100) and subsequent annealing. We find that the resulting defect distribution after annealing for 20 min at 900 °C is strongly affected by the surface morphology. Ion implantation of 2·1015 cm□2 B through a 20 nm thick, thermally grown screening oxide on a sample tilted by 6 ° towards <;100> results in 3 different local defect densities: (i) for those sides of the pyramids which are tilted into the ion beam, (ii) for those sides which are tilted out of the beam and (iii) for the valleys in between the pyramids. This difference in defect density is mirrored by the effective local ion doses as obtained from process simulations. After annealing for 20 min at 1050 °C defects are observed only within the valleys of the texture.","PeriodicalId":6548,"journal":{"name":"2014 20th International Conference on Ion Implantation Technology (IIT)","volume":"54 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85065590","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-30DOI: 10.1109/IIT.2014.6939996
S. Loan, F. Bashir, M. Rafat, A. Alamoud, S. A. Abbasi
In this work, we propose a new structure of a double gate dopingless metal oxide semiconductor field effect transistor (MOSFET). The proposed device does not employ the conventional ways of ion implantation or diffusion to realize source and drain regions. However, it uses metals of different workfunctions to induce n+ source and drain regions in undoped silicon; a charge plasma concept. A 2D numerical simulation study has shown that a significant improvement in various performance parameters has been achieved in the proposed device. It is observed that the subthreshold slope (S) and cutoff frequency (fT)has significantly improved in the proposed device in comparison to a conventional doped MOSFET. Further, the leakage current was significantly decreased in the proposed device. Furthermore, since the proposed device does not employ ion implantation or diffusion to realize source and drain regions, therefore, it is free from random doping fluctuations (RDF) and doping control issues, and most importantly, it can be processed at low temperature.
{"title":"A high performance double gate dopingless metal oxide semiconductor field effect transistor","authors":"S. Loan, F. Bashir, M. Rafat, A. Alamoud, S. A. Abbasi","doi":"10.1109/IIT.2014.6939996","DOIUrl":"https://doi.org/10.1109/IIT.2014.6939996","url":null,"abstract":"In this work, we propose a new structure of a double gate dopingless metal oxide semiconductor field effect transistor (MOSFET). The proposed device does not employ the conventional ways of ion implantation or diffusion to realize source and drain regions. However, it uses metals of different workfunctions to induce n+ source and drain regions in undoped silicon; a charge plasma concept. A 2D numerical simulation study has shown that a significant improvement in various performance parameters has been achieved in the proposed device. It is observed that the subthreshold slope (S) and cutoff frequency (fT)has significantly improved in the proposed device in comparison to a conventional doped MOSFET. Further, the leakage current was significantly decreased in the proposed device. Furthermore, since the proposed device does not employ ion implantation or diffusion to realize source and drain regions, therefore, it is free from random doping fluctuations (RDF) and doping control issues, and most importantly, it can be processed at low temperature.","PeriodicalId":6548,"journal":{"name":"2014 20th International Conference on Ion Implantation Technology (IIT)","volume":"39 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76825384","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-30DOI: 10.1109/IIT.2014.6940036
D. Kirkwood, J. Deluca, Jonathan David
Industry consolidation in semiconductor manufacturing, driven by commoditization and decreasing margins, is placing ever increasing pressure on fab productivity. Concomitant technology innovation, shrinking device geometries, the transition to non-planar transistors and novel device structures (such as CIS or IGBT) make yield attainment increasingly challenging. The defect level performance of semiconductor manufacturing equipment, in particular in ion implantation, is one of the critical parameters contributing to overall yield performance. This is evidenced through recent large shifts in both particle and metals requirements from device manufacturers. Traditional implanter design approaches, focused on glitch reduction or beam current modulation, are necessary but insufficient to attain simultaneous compliance of availability, throughput and defect levels. In this paper, a holistic approach to defect control is detailed. Examples of contamination control best practices are described. These are combined into an overarching design for process cleanliness (DfPC) methodology, through identification and mitigation of defect opportunities (particulates, metals). Data from the Purion platform of ion implanters demonstrate that, through application of an integrated, common design method, required defect performance can be attained across multiple ion implant platforms.
{"title":"Contamination control in Axcelis Purion platform ion implanters","authors":"D. Kirkwood, J. Deluca, Jonathan David","doi":"10.1109/IIT.2014.6940036","DOIUrl":"https://doi.org/10.1109/IIT.2014.6940036","url":null,"abstract":"Industry consolidation in semiconductor manufacturing, driven by commoditization and decreasing margins, is placing ever increasing pressure on fab productivity. Concomitant technology innovation, shrinking device geometries, the transition to non-planar transistors and novel device structures (such as CIS or IGBT) make yield attainment increasingly challenging. The defect level performance of semiconductor manufacturing equipment, in particular in ion implantation, is one of the critical parameters contributing to overall yield performance. This is evidenced through recent large shifts in both particle and metals requirements from device manufacturers. Traditional implanter design approaches, focused on glitch reduction or beam current modulation, are necessary but insufficient to attain simultaneous compliance of availability, throughput and defect levels. In this paper, a holistic approach to defect control is detailed. Examples of contamination control best practices are described. These are combined into an overarching design for process cleanliness (DfPC) methodology, through identification and mitigation of defect opportunities (particulates, metals). Data from the Purion platform of ion implanters demonstrate that, through application of an integrated, common design method, required defect performance can be attained across multiple ion implant platforms.","PeriodicalId":6548,"journal":{"name":"2014 20th International Conference on Ion Implantation Technology (IIT)","volume":"3 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80991130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-30DOI: 10.1109/IIT.2014.6940004
A. Burenkov, J. Lorenz, Y. Spiegel, F. Torregrosa
Plasma immersion ion implantation from AsH3 plasma into (100) crystalline silicon was performed using the PULSION tool of Ion Beam Services. Ultra-shallow arsenic doping profiles with maximum concentrations in excess of 1×1022 cm-3 and penetration depths below 10 nm at a concentration of 1×1018 cm-3 were obtained. Two simulation models were applied to describe the observed arsenic profiles: the one developed by the authors earlier for BF3 plasma and a new one that accounts for the specifics of AsH3 plasma.
{"title":"Simulation of AsH3 plasma immersion ion implantation into silicon","authors":"A. Burenkov, J. Lorenz, Y. Spiegel, F. Torregrosa","doi":"10.1109/IIT.2014.6940004","DOIUrl":"https://doi.org/10.1109/IIT.2014.6940004","url":null,"abstract":"Plasma immersion ion implantation from AsH<sub>3</sub> plasma into (100) crystalline silicon was performed using the PULSION tool of Ion Beam Services. Ultra-shallow arsenic doping profiles with maximum concentrations in excess of 1×10<sup>22</sup> cm<sup>-3</sup> and penetration depths below 10 nm at a concentration of 1×10<sup>18</sup> cm<sup>-3</sup> were obtained. Two simulation models were applied to describe the observed arsenic profiles: the one developed by the authors earlier for BF<sub>3</sub> plasma and a new one that accounts for the specifics of AsH<sub>3</sub> plasma.","PeriodicalId":6548,"journal":{"name":"2014 20th International Conference on Ion Implantation Technology (IIT)","volume":"1 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83104026","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-30DOI: 10.1109/IIT.2014.6939770
F. Torregrosa, J. Duchaine, Y. Spiegel, Ludovic Vivian, S. Qin, Y. Hu, A. Mcteer
Plasma immersion ion implantation (PIII) technology is an alternative that overcomes the limitations of conventional beam line ion implantation for shallow, high dose and 3D doping on advanced memory and logic devices. This technique also delivers a better CoO as the result of higher productivity, smaller footprint and lower operating costs. With the requirements of new device architecture such as FINFET or FD-SOI for Logic, reduction of cell sizes for Memories, or 3D integration for “More than Moore” applications, a shallow profile is not the only critical objective. Amorphization and defects prevention become key points to allow good recrystallization and activation after annealing while reducing the thermal budget. IBS has developed and implemented the technique of high temperature implantation (up to 500°C) on the PIII system, PULSION®. In this paper, we present the impact of high temperature AsH3 Plasma doping in silicon. ARXPS (Angle Resolution X-ray Photoelectron Spectroscopy), SIMS (Secondary Ion Mass Spectrometry), and TEM (Transmission Electron Microscopy) analysis are used to study impact of the temperature on doping profiles and amorphization layer thickness. We show that when “high” acceleration voltage and high doses are used, thickness of the amorphization layer is drastically reduced (figure 1), and when lower acceleration voltage is used, amorphization layer can be totally suppressed.
{"title":"High temperature Plasma Immersion Ion Implantation of AsH3 using PULSION®","authors":"F. Torregrosa, J. Duchaine, Y. Spiegel, Ludovic Vivian, S. Qin, Y. Hu, A. Mcteer","doi":"10.1109/IIT.2014.6939770","DOIUrl":"https://doi.org/10.1109/IIT.2014.6939770","url":null,"abstract":"Plasma immersion ion implantation (PIII) technology is an alternative that overcomes the limitations of conventional beam line ion implantation for shallow, high dose and 3D doping on advanced memory and logic devices. This technique also delivers a better CoO as the result of higher productivity, smaller footprint and lower operating costs. With the requirements of new device architecture such as FINFET or FD-SOI for Logic, reduction of cell sizes for Memories, or 3D integration for “More than Moore” applications, a shallow profile is not the only critical objective. Amorphization and defects prevention become key points to allow good recrystallization and activation after annealing while reducing the thermal budget. IBS has developed and implemented the technique of high temperature implantation (up to 500°C) on the PIII system, PULSION®. In this paper, we present the impact of high temperature AsH3 Plasma doping in silicon. ARXPS (Angle Resolution X-ray Photoelectron Spectroscopy), SIMS (Secondary Ion Mass Spectrometry), and TEM (Transmission Electron Microscopy) analysis are used to study impact of the temperature on doping profiles and amorphization layer thickness. We show that when “high” acceleration voltage and high doses are used, thickness of the amorphization layer is drastically reduced (figure 1), and when lower acceleration voltage is used, amorphization layer can be totally suppressed.","PeriodicalId":6548,"journal":{"name":"2014 20th International Conference on Ion Implantation Technology (IIT)","volume":"52 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86660310","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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